--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca953x.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "glinet,gl-x750", "qca,qca9531";
+ model = "GL.iNet GL-X750";
+
+ keys {
+ compatible = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&jtag_disable_pins>;
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "green:power";
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ wlan2g {
+ label = "green:wlan2g";
+ gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+
+ wlan5g {
+ label = "green:wlan5g";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+
+ wan {
+ label = "green:wan";
+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ };
+
+ 4g {
+ label = "green:4g";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ art: partition@50000 {
+ label = "art";
+ reg = <0x050000 0x010000>;
+ read-only;
+ };
+
+ partition@60000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x060000 0xfa0000>;
+ };
+ };
+ };
+};
+
+ð0 {
+ status = "okay";
+
+ phy-handle = <&swphy4>;
+
+ nvmem-cells = <&macaddr_art_0>;
+ nvmem-cell-names = "mac-address";
+};
+
+ð1 {
+ nvmem-cells = <&macaddr_art_0>;
+ nvmem-cell-names = "mac-address";
+ mac-address-increment = <1>;
+};
+
+&wmac {
+ status = "okay";
+
+ mtd-cal-data = <&art 0x1000>;
+};
+
+&art {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_art_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+};