EXYNOS5: Add base address for SPI

Add base address definition for SPI device on Exynos.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
index e289e9e9c450f9e09d7ce6c800ab1904d8993219..d1b2ea8023ddfa3fae9eb3f39c3b39b94e0cdc98 100644 (file)
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -51,6 +51,7 @@
 #define EXYNOS4_UART_BASE              0x13800000
 #define EXYNOS4_I2C_BASE               0x13860000
 #define EXYNOS4_ADC_BASE               0x13910000
+#define EXYNOS4_SPI_BASE               0x13920000
 #define EXYNOS4_PWMTIMER_BASE          0x139D0000
 #define EXYNOS4_MODEM_BASE             0x13A00000
 #define EXYNOS4_USBPHY_CONTROL         0x10020704
@@ -58,6 +59,7 @@
 
 #define EXYNOS4_GPIO_PART4_BASE                DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE                        DEVICE_NOT_AVAILABLE
+#define EXYNOS4_SPI_ISP_BASE           DEVICE_NOT_AVAILABLE
 
 /* EXYNOS5 */
 #define EXYNOS5_I2C_SPACING            0x10000
@@ -82,8 +84,10 @@
 #define EXYNOS5_SROMC_BASE             0x12250000
 #define EXYNOS5_UART_BASE              0x12C00000
 #define EXYNOS5_I2C_BASE               0x12C60000
+#define EXYNOS5_SPI_BASE               0x12D20000
 #define EXYNOS5_I2S_BASE               0x12D60000
 #define EXYNOS5_PWMTIMER_BASE          0x12DD0000
+#define EXYNOS5_SPI_ISP_BASE           0x131A0000
 #define EXYNOS5_GPIO_PART2_BASE                0x13400000
 #define EXYNOS5_FIMD_BASE              0x14400000
 #define EXYNOS5_DP_BASE                        0x145B0000
@@ -185,6 +189,8 @@ SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE)
 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
 SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
 SAMSUNG_BASE(power, POWER_BASE)
+SAMSUNG_BASE(spi, SPI_BASE)
+SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
 #endif
 
 #endif /* _EXYNOS4_CPU_H */