armv8: ls2080: Add SFP Configs for LS2080
authorSaksham Jain <saksham.jain@nxp.com>
Wed, 23 Mar 2016 10:54:32 +0000 (16:24 +0530)
committerYork Sun <york.sun@nxp.com>
Tue, 29 Mar 2016 15:46:19 +0000 (08:46 -0700)
In LS2080, SFP has version 3.4. It is in little endian. The base
address is 0x01e80200. SFP is used in Secure Boot to read fuses.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/include/asm/arch-fsl-layerscape/config.h
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
include/fsl_sfp.h

index bfaece2d677f3a7d551c7ab0073dc3baa16c6953..35d59081a5389fa08ee7fb5c6d053ea89c92b753 100644 (file)
 /* SMMU Defintions */
 #define SMMU_BASE                      0x05000000 /* GR0 Base */
 
+/* SFP */
+#define CONFIG_SYS_FSL_SFP_VER_3_4
+#define CONFIG_SYS_FSL_SFP_LE
+
 /* Cache Coherent Interconnect */
 #define CCI_MN_BASE                    0x04000000
 #define CCI_MN_RNF_NODEID_LIST         0x180
index 081519aef7ef3982a31dbe3ad004f6f1e9da2fe6..6f1b1446492592abdfc2fe0ac7490c044283fd6c 100644 (file)
@@ -73,6 +73,9 @@
 #define AHCI_BASE_ADDR1                                (CONFIG_SYS_IMMR + 0x02200000)
 #define AHCI_BASE_ADDR2                                (CONFIG_SYS_IMMR + 0x02210000)
 
+/* SFP */
+#define CONFIG_SYS_SFP_ADDR            (CONFIG_SYS_IMMR + 0x00e80200)
+
 /* PCIe */
 #define CONFIG_SYS_PCIE1_ADDR                  (CONFIG_SYS_IMMR + 0x2400000)
 #define CONFIG_SYS_PCIE2_ADDR                  (CONFIG_SYS_IMMR + 0x2500000)
index 353a123ee559d6b337a19bde5782ba1846fd7878..2976a2cbef6b97f0ca5d58b9aaf0b92ab7644a8c 100644 (file)
@@ -32,7 +32,8 @@
 /* Number of SRKH registers */
 #define NUM_SRKH_REGS  8
 
-#ifdef CONFIG_SYS_FSL_SFP_VER_3_2
+#if    defined(CONFIG_SYS_FSL_SFP_VER_3_2) ||  \
+       defined(CONFIG_SYS_FSL_SFP_VER_3_4)
 struct ccsr_sfp_regs {
        u32 ospr;               /* 0x200 */
        u32 ospr1;              /* 0x204 */