#endif
/* Set the initial clock speed */
- mmc_set_clock(mmc, 400000);
+ mmc_set_clock(mmc, 400000, false);
/* Disable the BRR and BWR bits in IRQSTAT */
esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
}
#endif
-int mmc_set_clock(struct mmc *mmc, uint clock)
+int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
{
if (clock > mmc->cfg->f_max)
clock = mmc->cfg->f_max;
clock = mmc->cfg->f_min;
mmc->clock = clock;
+ mmc->clk_disable = disable;
return mmc_set_ios(mmc);
}
/* configure the bus mode (host) */
mmc_select_mode(mmc, mwt->mode);
- mmc_set_clock(mmc, mmc->tran_speed);
+ mmc_set_clock(mmc, mmc->tran_speed, false);
err = sd_read_ssr(mmc);
if (!err)
error:
/* revert to a safer bus speed */
mmc_select_mode(mmc, SD_LEGACY);
- mmc_set_clock(mmc, mmc->tran_speed);
+ mmc_set_clock(mmc, mmc->tran_speed, false);
}
}
}
/* configure the bus mode (host) */
mmc_select_mode(mmc, mwt->mode);
- mmc_set_clock(mmc, mmc->tran_speed);
+ mmc_set_clock(mmc, mmc->tran_speed, false);
/* do a transfer to check the configuration */
err = mmc_read_and_compare_ext_csd(mmc);
mmc_select_mode(mmc, MMC_LEGACY);
mmc_set_bus_width(mmc, 1);
- mmc_set_clock(mmc, 0);
+ mmc_set_clock(mmc, 0, false);
}
static int mmc_power_on(struct mmc *mmc)
void *priv;
uint has_init;
int high_capacity;
+ bool clk_disable; /* true if the clock can be turned off */
uint bus_width;
uint clock;
enum mmc_voltage signal_voltage;
int mmc_initialize(bd_t *bis);
int mmc_init(struct mmc *mmc);
int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
-int mmc_set_clock(struct mmc *mmc, uint clock);
+
+/**
+ * mmc_set_clock() - change the bus clock
+ * @mmc: MMC struct
+ * @clock: bus frequency in Hz
+ * @disable: flag indicating if the clock must on or off
+ * @return 0 if OK, -ve on error
+ */
+int mmc_set_clock(struct mmc *mmc, uint clock, bool disable);
+
struct mmc *find_mmc_device(int dev_num);
int mmc_set_dev(int dev_num);
void print_mmc_devices(char separator);