board/t1024qds: update pin multiplexing
authorShengzhou Liu <Shengzhou.Liu@freescale.com>
Mon, 24 Nov 2014 09:11:58 +0000 (17:11 +0800)
committerYork Sun <yorksun@freescale.com>
Fri, 5 Dec 2014 16:06:15 +0000 (08:06 -0800)
Add multiplexing support among SPI flash, TDM riser card and SDXC.
it routes SPI pins to SPI flash by default.
Route SPI pins to SD slot if "adaptor=sdxc" is set in hwconfig.
Route SPI pins to TDM riser card and do fixup for dts if "pin_mux=tdm"
is set in hwconfig.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
board/freescale/t102xqds/t102xqds.c
board/freescale/t102xqds/t102xqds_qixis.h

index 97ef95a65043e433204d4d6db72c3d8a55130de9..335711bde45e79d0017c4853fd4d8858f0fe8858 100644 (file)
@@ -165,6 +165,8 @@ static void board_mux_setup(void)
                /* Route QE_TDM multiplexed signals to TDM Riser slot */
                QIXIS_WRITE(brdcfg[15], brdcfg15 | BRDCFG15_DIUSEL_TDM);
                QIXIS_WRITE(brdcfg[13], BRDCFG13_TDM_INTERFACE << 2);
+               QIXIS_WRITE(brdcfg[5], (QIXIS_READ(brdcfg[5]) &
+                           ~BRDCFG5_SPIRTE_MASK) | BRDCFG5_SPIRTE_TDM);
        } else if (hwconfig_arg_cmp("pin_mux", "ucc")) {
                /* to UCC (ProfiBus) interface */
                QIXIS_WRITE(brdcfg[15], brdcfg15 | BRDCFG15_DIUSEL_UCC);
@@ -176,6 +178,11 @@ static void board_mux_setup(void)
                QIXIS_WRITE(brdcfg[15], brdcfg15 | BRDCFG15_LCDFM |
                            BRDCFG15_LCDPD | BRDCFG15_DIUSEL_LCD);
        }
+
+       if (hwconfig_arg_cmp("adaptor", "sdxc"))
+               /* Route SPI_CS multiplexed signals to SD slot */
+               QIXIS_WRITE(brdcfg[5], (QIXIS_READ(brdcfg[5]) &
+                           ~BRDCFG5_SPIRTE_MASK) | BRDCFG5_SPIRTE_SDHC);
 }
 #endif
 
@@ -265,6 +272,24 @@ int misc_init_r(void)
        return 0;
 }
 
+void fdt_fixup_spi_mux(void *blob)
+{
+       int nodeoff = 0;
+
+       if (hwconfig_arg_cmp("pin_mux", "tdm")) {
+               while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
+                       "eon,en25s64")) >= 0) {
+                       fdt_del_node(blob, nodeoff);
+               }
+       } else {
+               /* remove tdm node */
+               while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
+                       "maxim,ds26522")) >= 0) {
+                       fdt_del_node(blob, nodeoff);
+               }
+       }
+}
+
 int ft_board_setup(void *blob, bd_t *bd)
 {
        phys_addr_t base;
@@ -291,6 +316,7 @@ int ft_board_setup(void *blob, bd_t *bd)
        fdt_fixup_fman_ethernet(blob);
        fdt_fixup_board_enet(blob);
 #endif
+       fdt_fixup_spi_mux(blob);
 
        return 0;
 }
index ad83f0376059274dabde01b6c3116c240abe0d5d..a429fb7216483cc2474a7ed480a706ee1dfbee0b 100644 (file)
@@ -17,6 +17,9 @@
 #define BRDCFG5_IMX_MASK               0xC0
 #define BRDCFG5_IMX_DIU                        0x80
 
+#define BRDCFG5_SPIRTE_MASK            0x07
+#define BRDCFG5_SPIRTE_TDM             0x01
+#define BRDCFG5_SPIRTE_SDHC            0x02
 #define BRDCFG9_XFI_TX_DISABLE         0x10
 
 /* BRDCFG13[0:5] TDM configuration and setup */
@@ -35,8 +38,8 @@
 #define BRDCFG15_DIUSEL_MASK           0x03
 #define BRDCFG15_DIUSEL_HDMI           0x00
 #define BRDCFG15_DIUSEL_LCD            0x01
-#define BRDCFG15_DIUSEL_UCC            0x10
-#define BRDCFG15_DIUSEL_TDM            0x11
+#define BRDCFG15_DIUSEL_UCC            0x02
+#define BRDCFG15_DIUSEL_TDM            0x03
 
 /* SYSCLK */
 #define QIXIS_SYSCLK_66                        0x0