Update AMCC Yosemite to get a consistent setup for all AMCC eval
authorStefan Roese <sr@denx.de>
Thu, 15 Sep 2005 09:34:07 +0000 (11:34 +0200)
committerStefan Roese <sr@denx.de>
Thu, 15 Sep 2005 09:34:07 +0000 (11:34 +0200)
boards (baudrate, environment...). Flash driver fixed.
Patch by Stefan Roese, 15 Sep 2005

CHANGELOG
board/amcc/yellowstone/Makefile
board/amcc/yellowstone/flash.c [deleted file]
board/amcc/yellowstone/init.S
board/amcc/yellowstone/yellowstone.c
include/configs/yellowstone.h

index 7c2bdab83c77774f3cf345b4c6b8353cec5ea11c..bd50db2ae7745284622a4e01906071b22733a505 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,10 @@
 Changes for U-Boot 1.1.4:
 ======================================================================
 
+* Update AMCC Yosemite to get a consistent setup for all AMCC eval
+  boards (baudrate, environment...). Flash driver fixed.
+  Patch by Stefan Roese, 15 Sep 2005
+
 * Fix problem in 440GP ethernet driver (ebony). Add support for 2nd
   ethernet port on ebony.
   Patch by Stefan Roese, 7 Sep 2005
index 5654f91a83513402b92ca853e836ed08209312b9..47116d3674691a1389f37d6ede0ddedeb3c55420 100644 (file)
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB    = lib$(BOARD).a
 
 OBJS   = $(BOARD).o
-OBJS   += flash.o
 SOBJS  = init.o
 
 $(LIB):        $(OBJS) $(SOBJS)
diff --git a/board/amcc/yellowstone/flash.c b/board/amcc/yellowstone/flash.c
deleted file mode 100644 (file)
index cd6a2e6..0000000
+++ /dev/null
@@ -1,571 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-/*
- * Ported to XPedite1000, 1/2 mb boot flash only
- * Travis B. Sawyer, <travis.sawyer@sandburst.com>
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif                         /* DEBUG */
-
-#define BOOT_SMALL_FLASH       32      /* 00100000 */
-#define FLASH_ONBD_N           2       /* 00000010 */
-#define FLASH_SRAM_SEL         1       /* 00000001 */
-
-#define BOOT_SMALL_FLASH_VAL   4
-#define FLASH_ONBD_N_VAL       2
-#define FLASH_SRAM_SEL_VAL     1
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];  /* info for FLASH chips   */
-
-unsigned long flash_addr_table[512][CFG_MAX_FLASH_BANKS] = {
-       {0xfe000000}
-
-};
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_word(flash_info_t * info, ulong dest, ulong data);
-
-#define ADDR0          0xaaaa
-#define ADDR1          0x5554
-#define FLASH_WORD_SIZE unsigned short
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
-       unsigned long total_b = 0;
-       unsigned long size_b[CFG_MAX_FLASH_BANKS];
-       unsigned short index = 0;
-       int i;
-
-       DEBUGF("\n");
-       DEBUGF("FLASH: Index: %d\n", index);
-
-       /* Init: no FLASHes known */
-       for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
-               flash_info[i].flash_id = FLASH_UNKNOWN;
-               flash_info[i].sector_count = -1;
-               flash_info[i].size = 0;
-
-               /* check whether the address is 0 */
-               if (flash_addr_table[index][i] == 0) {
-                       continue;
-               }
-
-               /* call flash_get_size() to initialize sector address */
-               size_b[i] = flash_get_size((vu_long *)
-                                          flash_addr_table[index][i],
-                                          &flash_info[i]);
-               flash_info[i].size = size_b[i];
-               if (flash_info[i].flash_id == FLASH_UNKNOWN) {
-                       printf
-                           ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
-                            i, size_b[i], size_b[i] << 20);
-                       flash_info[i].sector_count = -1;
-                       flash_info[i].size = 0;
-               }
-
-               total_b += flash_info[i].size;
-       }
-
-       /* FLASH protect Monitor */
-       flash_protect(FLAG_PROTECT_SET,
-                     CFG_MONITOR_BASE, 0xFFFFFFFF, &flash_info[0]);
-
-       return total_b;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t * info)
-{
-       int i;
-       int k;
-       int size;
-       int erased;
-       volatile unsigned long *flash;
-
-       if (info->flash_id == FLASH_UNKNOWN) {
-               printf("missing or unknown FLASH type\n");
-               return;
-       }
-
-       switch (info->flash_id & FLASH_VENDMASK) {
-       case FLASH_MAN_AMD:
-               printf("AMD ");
-               break;
-       case FLASH_MAN_FUJ:
-               printf("FUJITSU ");
-               break;
-       case FLASH_MAN_SST:
-               printf("SST ");
-               break;
-       default:
-               printf("Unknown Vendor ");
-               break;
-       }
-
-       switch (info->flash_id & FLASH_TYPEMASK) {
-       case FLASH_AMD016:
-               printf("AM29F016D (16 Mbit, uniform sector size)\n");
-               break;
-       case FLASH_AM040:
-               printf("AM29F040 (512 Kbit, uniform sector size)\n");
-               break;
-       case FLASH_AM400B:
-               printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
-               break;
-       case FLASH_AM400T:
-               printf("AM29LV400T (4 Mbit, top boot sector)\n");
-               break;
-       case FLASH_AM800B:
-               printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
-               break;
-       case FLASH_AM800T:
-               printf("AM29LV800T (8 Mbit, top boot sector)\n");
-               break;
-       case FLASH_AM160B:
-               printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
-               break;
-       case FLASH_AM160T:
-               printf("AM29LV160T (16 Mbit, top boot sector)\n");
-               break;
-       case FLASH_AM320B:
-               printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
-               break;
-       case FLASH_AM320T:
-               printf("AM29LV320T (32 Mbit, top boot sector)\n");
-               break;
-       case FLASH_SST800A:
-               printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
-               break;
-       case FLASH_SST160A:
-               printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
-               break;
-       default:
-               printf("Unknown Chip Type\n");
-               break;
-       }
-
-       printf("  Size: %ld KB in %d Sectors\n",
-              info->size >> 10, info->sector_count);
-
-       printf("  Sector Start Addresses:");
-       for (i = 0; i < info->sector_count; ++i) {
-               /*
-                * Check if whole sector is erased
-                */
-               if (i != (info->sector_count - 1))
-                       size = info->start[i + 1] - info->start[i];
-               else
-                       size = info->start[0] + info->size - info->start[i];
-               erased = 1;
-               flash = (volatile unsigned long *)info->start[i];
-               size = size >> 2;       /* divide by 4 for longword access */
-               for (k = 0; k < size; k++) {
-                       if (*flash++ != 0xffffffff) {
-                               erased = 0;
-                               break;
-                       }
-               }
-
-               if ((i % 5) == 0)
-                       printf("\n   ");
-               printf(" %08lX%s%s",
-                      info->start[i],
-                      erased ? " E" : "  ", info->protect[i] ? "RO " : "   ");
-       }
-       printf("\n");
-       return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-{
-       short i;
-       FLASH_WORD_SIZE value;
-       ulong base = (ulong) addr;
-       volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
-
-       DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
-
-       /* Write auto select command: read Manufacturer ID */
-       udelay(10000);
-       *(FLASH_WORD_SIZE *) ((int)addr + ADDR0) = (FLASH_WORD_SIZE) 0x00AA;
-       udelay(1000);
-       *(FLASH_WORD_SIZE *) ((int)addr + ADDR1) = (FLASH_WORD_SIZE) 0x0055;
-       udelay(1000);
-       *(FLASH_WORD_SIZE *) ((int)addr + ADDR0) = (FLASH_WORD_SIZE) 0x0090;
-       udelay(1000);
-
-       value = addr2[0];
-
-       DEBUGF("FLASH MANUFACT: %x\n", value);
-
-       switch (value) {
-       case (FLASH_WORD_SIZE) AMD_MANUFACT:
-               info->flash_id = FLASH_MAN_AMD;
-               break;
-       case (FLASH_WORD_SIZE) FUJ_MANUFACT:
-               info->flash_id = FLASH_MAN_FUJ;
-               break;
-       case (FLASH_WORD_SIZE) SST_MANUFACT:
-               info->flash_id = FLASH_MAN_SST;
-               break;
-       case (FLASH_WORD_SIZE) STM_MANUFACT:
-               info->flash_id = FLASH_MAN_STM;
-               break;
-       default:
-               info->flash_id = FLASH_UNKNOWN;
-               info->sector_count = 0;
-               info->size = 0;
-               return (0);     /* no or unknown flash  */
-       }
-
-#ifdef CONFIG_ADCIOP
-       value = addr2[0];       /* device ID            */
-       debug("\ndev_code=%x\n", value);
-#else
-       value = addr2[1];       /* device ID            */
-#endif
-
-       DEBUGF("\nFLASH DEVICEID: %x\n", value);
-
-       info->flash_id = 0;
-       info->sector_count = CFG_MAX_FLASH_SECT;
-       info->size = 0x02000000;
-
-       /* set up sector start address table */
-       for (i = 0; i < info->sector_count; i++) {
-               info->start[i] = (int)base + (i * 0x00020000);
-               info->protect[i] = 0;
-       }
-
-       *(FLASH_WORD_SIZE *) ((int)addr) = (FLASH_WORD_SIZE) 0x00F0;    /* reset bank */
-
-       return (info->size);
-}
-
-int wait_for_DQ7(flash_info_t * info, int sect)
-{
-       ulong start, now, last;
-       volatile FLASH_WORD_SIZE *addr =
-           (FLASH_WORD_SIZE *) (info->start[sect]);
-
-       start = get_timer(0);
-       last = start;
-       while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
-              (FLASH_WORD_SIZE) 0x00800080) {
-               if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
-                       printf("Timeout\n");
-                       return -1;
-               }
-               /* show that we're waiting */
-               if ((now - last) > 1000) {      /* every second */
-                       putc('.');
-                       last = now;
-               }
-       }
-       return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
-       volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
-       volatile FLASH_WORD_SIZE *addr2;
-       int flag, prot, sect, l_sect;
-
-       if ((s_first < 0) || (s_first > s_last)) {
-               if (info->flash_id == FLASH_UNKNOWN) {
-                       printf("- missing\n");
-               } else {
-                       printf("- no sectors to erase\n");
-               }
-               return 1;
-       }
-
-       if (info->flash_id == FLASH_UNKNOWN) {
-               printf("Can't erase unknown flash type - aborted\n");
-               return 1;
-       }
-
-       prot = 0;
-       for (sect = s_first; sect <= s_last; ++sect) {
-               if (info->protect[sect]) {
-                       prot++;
-               }
-       }
-
-       if (prot) {
-               printf("- Warning: %d protected sectors will not be erased!\n",
-                      prot);
-       } else {
-               printf("\n");
-       }
-
-       l_sect = -1;
-
-       /* Disable interrupts which might cause a timeout here */
-       flag = disable_interrupts();
-
-       /* Start erase on unprotected sectors */
-       for (sect = s_first; sect <= s_last; sect++) {
-               if (info->protect[sect] == 0) { /* not protected */
-                       addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
-                       printf("Erasing sector %p\n", addr2);
-                       *(FLASH_WORD_SIZE *) ((int)addr + ADDR0) =
-                           (FLASH_WORD_SIZE) 0x00AA;
-                       asm("sync");
-                       asm("isync");
-                       *(FLASH_WORD_SIZE *) ((int)addr + ADDR1) =
-                           (FLASH_WORD_SIZE) 0x0055;
-                       asm("sync");
-                       asm("isync");
-                       *(FLASH_WORD_SIZE *) ((int)addr + ADDR0) =
-                           (FLASH_WORD_SIZE) 0x0080;
-                       asm("sync");
-                       asm("isync");
-                       *(FLASH_WORD_SIZE *) ((int)addr + ADDR0) =
-                           (FLASH_WORD_SIZE) 0x00AA;
-                       asm("sync");
-                       asm("isync");
-                       *(FLASH_WORD_SIZE *) ((int)addr + ADDR1) =
-                           (FLASH_WORD_SIZE) 0x0055;
-                       asm("sync");
-                       asm("isync");
-                       addr2[0] = (FLASH_WORD_SIZE) 0x00300030;        /* sector erase */
-                       asm("sync");
-                       asm("isync");
-
-                       l_sect = sect;
-                       /*
-                        * Wait for each sector to complete, it's more
-                        * reliable.  According to AMD Spec, you must
-                        * issue all erase commands within a specified
-                        * timeout.  This has been seen to fail, especially
-                        * if printf()s are included (for debug)!!
-                        */
-                       wait_for_DQ7(info, sect);
-               }
-       }
-
-       /* re-enable interrupts if necessary */
-       if (flag)
-               enable_interrupts();
-
-       /* wait at least 80us - let's wait 1 ms */
-       udelay(1000);
-
-#if 0
-       /*
-        * We wait for the last triggered sector
-        */
-       if (l_sect < 0)
-               goto DONE;
-       wait_for_DQ7(info, l_sect);
-
-      DONE:
-#endif
-       /* reset to read mode */
-       addr = (FLASH_WORD_SIZE *) info->start[0];
-       addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
-       printf(" done\n");
-       return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-       ulong cp, wp, data;
-       int i, l, rc;
-       ulong status_value = 0;
-
-       wp = (addr & ~3);       /* get lower word aligned address */
-
-       /*
-        * handle unaligned start bytes
-        */
-       if ((l = addr - wp) != 0) {
-               data = 0;
-               for (i = 0, cp = wp; i < l; ++i, ++cp) {
-                       data = (data << 8) | (*(uchar *) cp);
-               }
-               for (; i < 4 && cnt > 0; ++i) {
-                       data = (data << 8) | *src++;
-                       --cnt;
-                       ++cp;
-               }
-               for (; cnt == 0 && i < 4; ++i, ++cp) {
-                       data = (data << 8) | (*(uchar *) cp);
-               }
-
-               if ((rc = write_word(info, wp, data)) != 0) {
-                       return (rc);
-               }
-               wp += 4;
-       }
-
-       /*
-        * handle word aligned part
-        */
-       while (cnt >= 4) {
-
-               /*print status if needed */
-               if ((wp >= (status_value + 0x20000))
-                   && (status_value < 0xFFFE0000)) {
-                       status_value = wp;
-                       printf("writing to sector 0x%X\n", status_value);
-               }
-
-               data = 0;
-               for (i = 0; i < 4; ++i) {
-                       data = (data << 8) | *src++;
-               }
-               if ((rc = write_word(info, wp, data)) != 0) {
-                       return (rc);
-               }
-               wp += 4;
-               cnt -= 4;
-       }
-
-       if (cnt == 0) {
-               return (0);
-       }
-
-       /*
-        * handle unaligned tail bytes
-        */
-       data = 0;
-       for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
-               data = (data << 8) | *src++;
-               --cnt;
-       }
-       for (; i < 4; ++i, ++cp) {
-               data = (data << 8) | (*(uchar *) cp);
-       }
-
-       return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word(flash_info_t * info, ulong dest, ulong data)
-{
-       vu_long *addr2 = (vu_long *) (info->start[0]);
-       volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
-       volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
-       ulong start;
-       int i;
-
-       /* Check if Flash is (sufficiently) erased */
-       if ((*((volatile FLASH_WORD_SIZE *)dest) &
-            (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
-               return (2);
-       }
-
-       for (i = 0; i < 4 / sizeof(FLASH_WORD_SIZE); i++) {
-               int flag;
-
-               /* Disable interrupts which might cause a timeout here */
-               flag = disable_interrupts();
-
-               *(FLASH_WORD_SIZE *) ((int)addr2 + ADDR0) =
-                   (FLASH_WORD_SIZE) 0x00AA;
-               asm("sync");
-               asm("isync");
-               *(FLASH_WORD_SIZE *) ((int)addr2 + ADDR1) =
-                   (FLASH_WORD_SIZE) 0x0055;
-               asm("sync");
-               asm("isync");
-               *(FLASH_WORD_SIZE *) ((int)addr2 + ADDR0) =
-                   (FLASH_WORD_SIZE) 0x00A0;
-               asm("sync");
-               asm("isync");
-
-               dest2[i] = data2[i];
-
-               /* re-enable interrupts if necessary */
-               if (flag)
-                       enable_interrupts();
-
-               /* data polling for D7 */
-               start = get_timer(0);
-               while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
-                      (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-
-                       if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
-                               return (1);
-                       }
-               }
-       }
-
-       return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
index 7ba43c7b0610d8dba9234dc46664f5f4273acf88..425ad0868f8950438b63e71de6db0f64f1649432 100644 (file)
 
 tlbtab:
     tlbtab_start
-       /*
-               0xf0000000 must be first, before relocation SA_I must be off to use the
-           dcache as stack. It is patched after relocation to enable SA_I
-       */
-    tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
-    tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
-    tlbentry( CFG_PCI_BASE, SZ_256M, 0xE0000000, 0, AC_R|AC_W|SA_G|SA_I )
-    tlbentry( CFG_NVRAM_BASE_ADDR, SZ_16K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
+
+    /*
+     * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+     * speed up boot process. It is patched after relocation to enable SA_I
+     */
+    tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
+
+    /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+    tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
+
+    tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
+    tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
+    tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
 
     /* PCI */
     tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
index a6b81e6008a9acda3c95f2bd799d9340189f77f1..982d8571e7b55f7accc97ed7e6217da76f518f31 100644 (file)
  */
 
 #include <common.h>
+#include <ppc4xx.h>
 #include <asm/processor.h>
 #include <spd_sdram.h>
 
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips   */
+
 int board_early_init_f(void)
 {
        register uint reg;
@@ -35,7 +38,7 @@ int board_early_init_f(void)
        mtdcr(ebccfgd, reg | 0x04000000);       /* Set ATC */
 
        mtebc(pb0ap, 0x03017300);       /* FLASH/SRAM */
-       mtebc(pb0cr, 0xfe0ba000);       /* BAS=0xfe0 32MB r/w 16-bit */
+       mtebc(pb0cr, 0xfc0da000);       /* BAS=0xfc0 64MB r/w 16-bit */
 
        mtebc(pb1ap, 0x00000000);
        mtebc(pb1cr, 0x00000000);
@@ -92,12 +95,14 @@ int board_early_init_f(void)
        out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000);
        out32(GPIO1_ISR2L, in32(GPIO1_ISR2L) | 0x00010000);
 
+#if 0 /* test-only */
        /*setup USB 2.0 */
        out32(GPIO1_TCR, in32(GPIO1_TCR) | 0xc0000000);
        out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x50000000);
        out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xf);
        out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0xaa);
        out32(GPIO0_ISR2H, in32(GPIO0_ISR2H) | 0x00000500);
+#endif
 
        /*--------------------------------------------------------------------
         * Setup other serial configuration
@@ -113,8 +118,10 @@ int board_early_init_f(void)
        /*enable ethernet */
        *(unsigned char *)(CFG_BCSR_BASE | 0x08) = 0xf0;
 
+#if 0 /* test-only */
        /*enable usb 1.1 fs device and remove usb 2.0 reset */
        *(unsigned char *)(CFG_BCSR_BASE | 0x09) = 0x00;
+#endif
 
        /*get rid of flash write protect */
        *(unsigned char *)(CFG_BCSR_BASE | 0x07) = 0x40;
@@ -122,6 +129,54 @@ int board_early_init_f(void)
        return 0;
 }
 
+int misc_init_r (void)
+{
+       DECLARE_GLOBAL_DATA_PTR;
+       uint pbcr;
+       int size_val = 0;
+
+       /* Re-do sizing to get full correct info */
+       mtdcr(ebccfga, pb0cr);
+       pbcr = mfdcr(ebccfgd);
+       switch (gd->bd->bi_flashsize) {
+       case 1 << 20:
+               size_val = 0;
+               break;
+       case 2 << 20:
+               size_val = 1;
+               break;
+       case 4 << 20:
+               size_val = 2;
+               break;
+       case 8 << 20:
+               size_val = 3;
+               break;
+       case 16 << 20:
+               size_val = 4;
+               break;
+       case 32 << 20:
+               size_val = 5;
+               break;
+       case 64 << 20:
+               size_val = 6;
+               break;
+       case 128 << 20:
+               size_val = 7;
+               break;
+       }
+       pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
+       mtdcr(ebccfga, pb0cr);
+       mtdcr(ebccfgd, pbcr);
+
+       /* Monitor protection ON by default */
+       (void)flash_protect(FLAG_PROTECT_SET,
+                           -CFG_MONITOR_LEN,
+                           0xffffffff,
+                           &flash_info[0]);
+
+       return 0;
+}
+
 int checkboard(void)
 {
        sys_info_t sysinfo;
@@ -135,6 +190,8 @@ int checkboard(void)
        printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000);
        printf("\tPER: %lu MHz\n", sysinfo.freqEPB / 1000000);
        printf("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000);
+
+
        return (0);
 }
 
@@ -170,6 +227,7 @@ void sdram_init(void)
         */
        mtsdram(mem_b0cr, 0x000a4001);  /* SDBA=0x000 128MB, Mode 3, enabled */
        mtsdram(mem_b1cr, 0x080a4001);  /* SDBA=0x080 128MB, Mode 3, enabled */
+
        mtsdram(mem_tr0, 0x410a4012);   /* ?? */
        mtsdram(mem_tr1, 0x8080080b);   /* ?? */
        mtsdram(mem_rtr, 0x04080000);   /* ?? */
@@ -256,8 +314,8 @@ int pci_pre_init(struct pci_controller *hose)
        unsigned long addr;
 
        /*--------------------------------------------------------------------------+
-     * Bamboo is always configured as the host & requires the
-     * PCI arbiter to be enabled.
+        *      Bamboo is always configured as the host & requires the
+        *      PCI arbiter to be enabled.
         *--------------------------------------------------------------------------*/
        mfsdr(sdr_sdstp1, strap);
        if ((strap & SDR0_SDSTP1_PAE_MASK) == 0) {
@@ -266,27 +324,27 @@ int pci_pre_init(struct pci_controller *hose)
                return 0;
        }
 
-    /*-------------------------------------------------------------------------+
-    | Set priority for all PLB3 devices to 0.
-    | Set PLB3 arbiter to fair mode.
-    +-------------------------------------------------------------------------*/
+       /*-------------------------------------------------------------------------+
+         | Set priority for all PLB3 devices to 0.
+         | Set PLB3 arbiter to fair mode.
+         +-------------------------------------------------------------------------*/
        mfsdr(sdr_amp1, addr);
        mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
        addr = mfdcr(plb3_acr);
        mtdcr(plb3_acr, addr | 0x80000000);
 
-    /*-------------------------------------------------------------------------+
-    | Set priority for all PLB4 devices to 0.
-    +-------------------------------------------------------------------------*/
+       /*-------------------------------------------------------------------------+
+         | Set priority for all PLB4 devices to 0.
+         +-------------------------------------------------------------------------*/
        mfsdr(sdr_amp0, addr);
        mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
        addr = mfdcr(plb4_acr) | 0xa0000000;    /* Was 0x8---- */
        mtdcr(plb4_acr, addr);
 
-    /*-------------------------------------------------------------------------+
-    | Set Nebula PLB4 arbiter to fair mode.
-    +-------------------------------------------------------------------------*/
-       /*  Segment0 */
+       /*-------------------------------------------------------------------------+
+         | Set Nebula PLB4 arbiter to fair mode.
+         +-------------------------------------------------------------------------*/
+       /* Segment0 */
        addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
        addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
        addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
@@ -318,13 +376,13 @@ void pci_target_init(struct pci_controller *hose)
        /*--------------------------------------------------------------------------+
         * Set up Direct MMIO registers
         *--------------------------------------------------------------------------*/
-   /*--------------------------------------------------------------------------+
-   | PowerPC440 EP PCI Master configuration.
-   | Map one 1Gig range of PLB/processor addresses to PCI memory space.
-   |   PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
-   |   Use byte reversed out routines to handle endianess.
-   | Make this region non-prefetchable.
-   +--------------------------------------------------------------------------*/
+       /*--------------------------------------------------------------------------+
+         | PowerPC440 EP PCI Master configuration.
+         | Map one 1Gig range of PLB/processor addresses to PCI memory space.
+         |   PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
+         |   Use byte reversed out routines to handle endianess.
+         | Make this region non-prefetchable.
+         +--------------------------------------------------------------------------*/
        out32r(PCIX0_PMM0MA, 0x00000000);       /* PMM0 Mask/Attribute - disabled b4 setting */
        out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE);  /* PMM0 Local Address */
        out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE);       /* PMM0 PCI Low Address */
@@ -374,11 +432,11 @@ void pci_master_init(struct pci_controller *hose)
 {
        unsigned short temp_short;
 
-   /*--------------------------------------------------------------------------+
-   | Write the PowerPC440 EP PCI Configuration regs.
-   |   Enable PowerPC440 EP to be a master on the PCI bus (PMM).
-   |   Enable PowerPC440 EP to act as a PCI memory target (PTM).
-   +--------------------------------------------------------------------------*/
+       /*--------------------------------------------------------------------------+
+         | Write the PowerPC440 EP PCI Configuration regs.
+         |   Enable PowerPC440 EP to be a master on the PCI bus (PMM).
+         |   Enable PowerPC440 EP to act as a PCI memory target (PTM).
+         +--------------------------------------------------------------------------*/
        pci_read_config_word(0, PCI_COMMAND, &temp_short);
        pci_write_config_word(0, PCI_COMMAND,
                              temp_short | PCI_COMMAND_MASTER |
@@ -418,5 +476,6 @@ int is_pci_host(struct pci_controller *hose)
 #if defined(CONFIG_HW_WATCHDOG)
 void hw_watchdog_reset(void)
 {
+
 }
 #endif
index 2b863371433e554ac6269029b6c32d1ca37feb45..081cff88beaa055b799175d23b2a88de78cb8845 100644 (file)
@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2005
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
 /*-----------------------------------------------------------------------
  * High Level Configuration Options
  *----------------------------------------------------------------------*/
-#define CONFIG_YELLOWSTONE                     1       /* Board is BAMBOO           */
-#define CONFIG_440GR                           1       /* Specific PPC440GR support */
-
-#define CONFIG_4xx                                     1       /* ... PPC4xx family    */
-#define CONFIG_BOARD_EARLY_INIT_F      1   /* Call board_early_init_f  */
-#undef CFG_DRAM_TEST                                   /* disable - takes long time! */
+#define CONFIG_YOLLOWSTONE     1       /* Board is Yellowstone         */
+#define CONFIG_440GR           1       /* Specific PPC440EP support    */
+#define CONFIG_4xx             1       /* ... PPC4xx family            */
 #define CONFIG_SYS_CLK_FREQ    66666666    /* external freq to pll     */
 
+#define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f     */
+#define CONFIG_MISC_INIT_R     1       /* call misc_init_r()           */
+
 /*-----------------------------------------------------------------------
  * Base addresses -- Note these are effective addresses where the
  * actual resources get mapped (not physical addresses)
  *----------------------------------------------------------------------*/
-#define CFG_SDRAM_BASE     0x00000000      /* _must_ be 0                  */
-#define CFG_FLASH_BASE     0xf0000000      /* start of FLASH           */
-#define CFG_MONITOR_BASE    TEXT_BASE      /* start of monitor         */
-#define CFG_PCI_MEMBASE            0xa0000000      /* mapped pci memory        */
-#define CFG_PCI_MEMBASE1    CFG_PCI_MEMBASE  + 0x10000000
-#define CFG_PCI_MEMBASE2    CFG_PCI_MEMBASE1 + 0x10000000
-#define CFG_PCI_MEMBASE3    CFG_PCI_MEMBASE2 + 0x10000000
-
+#define CFG_MONITOR_LEN                (512 * 1024)    /* Reserve 512 kB for Monitor   */
+#define CFG_MALLOC_LEN         (256 * 1024)    /* Reserve 256 kB for malloc()  */
+#define CFG_MONITOR_BASE       (-CFG_MONITOR_LEN)
+#define CFG_SDRAM_BASE         0x00000000          /* _must_ be 0      */
+#define CFG_FLASH_BASE         0xfc000000          /* start of FLASH   */
+#define CFG_PCI_MEMBASE                0xa0000000          /* mapped pci memory*/
+#define CFG_PCI_MEMBASE1        CFG_PCI_MEMBASE  + 0x10000000
+#define CFG_PCI_MEMBASE2        CFG_PCI_MEMBASE1 + 0x10000000
+#define CFG_PCI_MEMBASE3        CFG_PCI_MEMBASE2 + 0x10000000
 
 /*Don't change either of these*/
-#define CFG_PERIPHERAL_BASE 0xef600000     /* internal peripherals     */
-#define CFG_PCI_BASE       0xe0000000      /* internal PCI regs        */
+#define CFG_PERIPHERAL_BASE     0xef600000         /* internal peripherals*/
+#define CFG_PCI_BASE           0xe0000000          /* internal PCI regs*/
 /*Don't change either of these*/
 
-#define CFG_USB_DEVICE 0x50000000
-#define CFG_NVRAM_BASE_ADDR 0x80000000
-#define CFG_BCSR_BASE      (CFG_NVRAM_BASE_ADDR | 0x2000)
+#define CFG_USB_DEVICE          0x50000000
+#define CFG_NVRAM_BASE_ADDR     0x80000000
+#define CFG_BCSR_BASE          (CFG_NVRAM_BASE_ADDR | 0x2000)
+#define CFG_BOOT_BASE_ADDR      0xf0000000
 
 /*-----------------------------------------------------------------------
  * Initial RAM & stack pointer (placed in SDRAM)
  *----------------------------------------------------------------------*/
-#define CFG_INIT_RAM_ADDR        0xf0000000            /* DCache */
-#define CFG_INIT_RAM_END       0x2000
-#define CFG_GBL_DATA_SIZE      256                     /* num bytes initial data       */
+#define CFG_INIT_RAM_ADDR      0x70000000              /* DCache       */
+#define CFG_INIT_RAM_END       (8 << 10)
+#define CFG_GBL_DATA_SIZE      256                     /* num bytes initial data*/
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
-#define CFG_MONITOR_LEN            (256 * 1024)    /* Reserve 256 kB for Mon   */
-#define CFG_MALLOC_LEN     (128 * 1024)    /* Reserve 128 kB for malloc*/
-#define CFG_KBYTES_SDRAM       ( 128 * 1024)   /* 128MB                     */
-#define CFG_SDRAM_BANKS            (2)
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
 #define CFG_EXT_SERIAL_CLOCK   11059200 /* use external 11.059MHz clk  */
-#define CONFIG_BAUDRATE                        9600
-#define CONFIG_SERIAL_MULTI   1
+#define CONFIG_BAUDRATE                115200
+#define CONFIG_SERIAL_MULTI     1
 /*define this if you want console on UART1*/
 #undef CONFIG_UART1_CONSOLE
 
     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 
 /*-----------------------------------------------------------------------
- * NVRAM/RTC
- *
- * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
- * The DS1558 code assumes this condition
- *
+ * Environment
  *----------------------------------------------------------------------*/
-#define CFG_NVRAM_SIZE     (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
-#define CONFIG_RTC_DS1556      1                        /* DS1556 RTC          */
+/*
+ * Define here the location of the environment variables (FLASH or EEPROM).
+ * Note: DENX encourages to use redundant environment in FLASH.
+ */
+#if 1
+#define CFG_ENV_IS_IN_FLASH     1      /* use FLASH for environment vars       */
+#else
+#define CFG_ENV_IS_IN_EEPROM   1       /* use EEPROM for environment vars      */
+#endif
 
 /*-----------------------------------------------------------------------
  * FLASH related
  *----------------------------------------------------------------------*/
-#define CFG_MAX_FLASH_BANKS    1                   /* number of banks      */
-#define CFG_MAX_FLASH_SECT     256                 /* sectors per device   */
+#define CFG_FLASH_CFI                          /* The flash is CFI compatible  */
+#define CFG_FLASH_CFI_DRIVER                   /* Use common CFI driver        */
+#define CFG_FLASH_CFI_AMD_RESET 1              /* AMD RESET for STM 29W320DB!  */
+
+#define CFG_MAX_FLASH_BANKS    1       /* max number of memory banks           */
+#define CFG_MAX_FLASH_SECT     512     /* max number of sectors on one chip    */
 
-#undef CFG_FLASH_CHECKSUM
 #define CFG_FLASH_ERASE_TOUT   120000  /* Timeout for Flash Erase (in ms)      */
-#define CFG_FLASH_WRITE_TOUT   120000      /* Timeout for Flash Write (in ms)  */
+#define CFG_FLASH_WRITE_TOUT   500     /* Timeout for Flash Write (in ms)      */
+
+#define CFG_FLASH_EMPTY_INFO           /* print 'E' for empty sector on flinfo */
+
+#ifdef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE      0x20000         /* size of one complete sector  */
+#define CFG_ENV_ADDR           (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
+#define        CFG_ENV_SIZE            0x2000  /* Total Size of Environment Sector     */
+
+/* Address and size of Redundant Environment Sector    */
+#define CFG_ENV_ADDR_REDUND    (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND    (CFG_ENV_SIZE)
+#endif /* CFG_ENV_IS_IN_FLASH */
 
 /*-----------------------------------------------------------------------
  * DDR SDRAM
  *----------------------------------------------------------------------*/
 #undef CONFIG_SPD_EEPROM              /* Don't use SPD EEPROM for setup    */
+#define CFG_KBYTES_SDRAM        (128 * 1024)    /* 128MB                   */
+#define CFG_SDRAM_BANKS                (2)
+
 
 /*-----------------------------------------------------------------------
  * I2C
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address  */
 #define CFG_I2C_SLAVE          0x7F
 
-
-/*-----------------------------------------------------------------------
- * Environment
- *----------------------------------------------------------------------*/
-#undef CFG_ENV_IS_IN_NVRAM                 /*No NVRAM on board*/
-#undef CFG_ENV_IS_IN_FLASH                 /* ... not in flash         */
-#define CFG_ENV_IS_IN_EEPROM 1
-
-/* Define to allow the user to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
 #define CFG_I2C_MULTI_EEPROMS
-#define CFG_ENV_SIZE           0x200       /* Size of Environment vars */
-#define CFG_ENV_OFFSET         0x0
 #define CFG_I2C_EEPROM_ADDR    (0xa8>>1)
 #define CFG_I2C_EEPROM_ADDR_LEN 1
 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 #define CFG_EEPROM_PAGE_WRITE_BITS 3
 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
 
-#define CONFIG_BOOTCOMMAND     "bootm 0xfe000000"    /* autoboot command */
-#define CONFIG_BOOTDELAY       3                   /* disable autoboot */
+#ifdef CFG_ENV_IS_IN_EEPROM
+#define CFG_ENV_SIZE           0x200       /* Size of Environment vars */
+#define CFG_ENV_OFFSET         0x0
+#endif /* CFG_ENV_IS_IN_EEPROM */
+
+#define CONFIG_PREBOOT "echo;" \
+       "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+       "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define        CONFIG_EXTRA_ENV_SETTINGS                                       \
+       "netdev=eth0\0"                                                 \
+       "hostname=yellowstone\0"                                        \
+       "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
+               "nfsroot=$(serverip):$(rootpath)\0"                     \
+       "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
+       "addip=setenv bootargs $(bootargs) "                            \
+               "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"      \
+               ":$(hostname):$(netdev):off panic=1\0"                  \
+       "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
+       "flash_nfs=run nfsargs addip addtty;"                           \
+               "bootm $(kernel_addr)\0"                                \
+       "flash_self=run ramargs addip addtty;"                          \
+               "bootm $(kernel_addr) $(ramdisk_addr)\0"                \
+       "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;"     \
+               "bootm\0"                                               \
+       "rootpath=/opt/eldk/ppc_4xx\0"                                  \
+       "bootfile=/tftpboot/yellowstone/uImage\0"                       \
+       "kernel_addr=fc000000\0"                                        \
+       "ramdisk_addr=fc100000\0"                                       \
+       "load=tftp 100000 /tftpboot/yellowstone/u-boot.bin\0"           \
+       "update=protect off fff80000 ffffffff;era fff80000 ffffffff;"   \
+               "cp.b 100000 fff80000 80000;"                           \
+               "setenv filesize;saveenv\0"                             \
+       "upd=run load;run update\0"                                     \
+       ""
+#define CONFIG_BOOTCOMMAND     "run flash_self"
+
+#if 0
+#define CONFIG_BOOTDELAY       -1      /* autoboot disabled            */
+#else
+#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
+#endif
+
+#define CONFIG_BAUDRATE                115200
 
-#define CONFIG_LOADS_ECHO              1       /* echo on for serial download  */
+#define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change        */
 
-#define CONFIG_MII                     1       /* MII PHY management           */
-#define CONFIG_NET_MULTI    1  /* required for netconsole  */
-#define CONFIG_PHY1_ADDR    3
+#define CONFIG_MII             1       /* MII PHY management           */
+#define CONFIG_NET_MULTI        1      /* required for netconsole      */
+#define CONFIG_PHY1_ADDR        3
 #define CONFIG_HAS_ETH1                1       /* add support for "eth1addr"   */
 #define CONFIG_PHY_ADDR                1       /* PHY address, See schematics  */
-#define CONFIG_NETMASK         255.255.255.0
-#define CONFIG_IPADDR          10.0.4.251
-#define CONFIG_ETHADDR         00:10:EC:00:12:34
-#define CONFIG_ETH1ADDR                00:10:EC:00:12:35
 
 #define CFG_RX_ETH_BUFFER      32        /* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SERVERIP                10.0.4.115
 
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_HW_WATCHDOG                     /* watchdog */
 #endif
 
-#ifdef CONFIG_440EP
-       /* Need to define POST */
-#define CONFIG_COMMANDS               ((CONFIG_CMD_DFL | \
-                       CFG_CMD_DATE    |   \
-                       CFG_CMD_DHCP    |   \
-                       CFG_CMD_DIAG    |   \
-                       CFG_CMD_ECHO    |   \
-                       CFG_CMD_EEPROM  |   \
-                       CFG_CMD_ELF     |   \
-    /*     CFG_CMD_EXT2    |*/ \
-       /*              CFG_CMD_FAT             |*/     \
-                       CFG_CMD_I2C     |       \
-       /*              CFG_CMD_IDE             |*/     \
-                       CFG_CMD_IRQ     |       \
-    /*         CFG_CMD_KGDB    |*/     \
-                       CFG_CMD_MII     |   \
-                       CFG_CMD_PCI             |       \
-                       CFG_CMD_PING    |       \
-                       CFG_CMD_REGINFO |       \
-                       CFG_CMD_SDRAM   |   \
-                       CFG_CMD_FLASH   |   \
-       /*              CFG_CMD_SPI             |*/     \
-                       CFG_CMD_USB     |       \
-                       0 ) & ~CFG_CMD_IMLS)
-#else
-#define CONFIG_COMMANDS               ((CONFIG_CMD_DFL | \
-                       CFG_CMD_DATE    |   \
-                       CFG_CMD_DHCP    |   \
-                       CFG_CMD_DIAG    |   \
-                       CFG_CMD_ECHO    |   \
-                       CFG_CMD_EEPROM  |   \
-                       CFG_CMD_ELF     |   \
-    /*     CFG_CMD_EXT2    |*/ \
-       /*              CFG_CMD_FAT             |*/     \
-                       CFG_CMD_I2C     |       \
-       /*              CFG_CMD_IDE             |*/     \
-                       CFG_CMD_IRQ     |       \
-    /*         CFG_CMD_KGDB    |*/     \
-                       CFG_CMD_MII     |   \
-                       CFG_CMD_PCI             |       \
-                       CFG_CMD_PING    |       \
-                       CFG_CMD_REGINFO |       \
-                       CFG_CMD_SDRAM   |   \
-                       CFG_CMD_FLASH   |   \
-       /*              CFG_CMD_SPI             |*/     \
-                       0 ) & ~CFG_CMD_IMLS)
-#endif
+#define CONFIG_COMMANDS               (CONFIG_CMD_DFL  | \
+                               CFG_CMD_ASKENV  | \
+                               CFG_CMD_DHCP    | \
+                               CFG_CMD_DIAG    | \
+                               CFG_CMD_ELF     | \
+                               CFG_CMD_I2C     | \
+                               CFG_CMD_IRQ     | \
+                               CFG_CMD_MII     | \
+                               CFG_CMD_NET     | \
+                               CFG_CMD_NFS     | \
+                               CFG_CMD_PCI     | \
+                               CFG_CMD_PING    | \
+                               CFG_CMD_REGINFO | \
+                               CFG_CMD_SDRAM)
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
  * Miscellaneous configurable options
  */
 #define CFG_LONGHELP                   /* undef to save memory         */
-#define CFG_PROMPT     "=> "           /* Monitor Command Prompt       */
+#define CFG_PROMPT             "=> "   /* Monitor Command Prompt       */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE     1024            /* Console I/O Buffer Size      */
+#define CFG_CBSIZE             1024    /* Console I/O Buffer Size      */
 #else
-#define CFG_CBSIZE     256             /* Console I/O Buffer Size      */
+#define CFG_CBSIZE             256     /* Console I/O Buffer Size      */
 #endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS    16              /* max number of command args   */
-#define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
+#define CFG_PBSIZE              (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS            16      /* max number of command args   */
+#define CFG_BARGSIZE           CFG_CBSIZE /* Boot Argument Buffer Size */
 
-#define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
-#define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
+#define CFG_MEMTEST_START      0x0400000 /* memtest works on           */
+#define CFG_MEMTEST_END                0x0C00000 /* 4 ... 12 MB in DRAM        */
 
 #define CFG_LOAD_ADDR          0x100000        /* default load address */
-#define CFG_EXTBDINFO              1   /* To use extended board_into (bd_t) */
-#define CONFIG_LYNXKDI         1   /* support kdi files */
+#define CFG_EXTBDINFO          1       /* To use extended board_into (bd_t) */
+#define CONFIG_LYNXKDI          1       /* support kdi files            */
 
-#define CFG_HZ         1000            /* decrementer freq: 1 ms ticks */
+#define CFG_HZ                 1000    /* decrementer freq: 1 ms ticks */
 
 /*-----------------------------------------------------------------------
  * PCI stuff
  *-----------------------------------------------------------------------
  */
 /* General PCI */
-#define CONFIG_PCI                                 /* include pci support              */
-#undef CONFIG_PCI_PNP                          /* do (not) pci plug-and-play         */
-#define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup  */
-#define CFG_PCI_TARGBASE    0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
+#define CONFIG_PCI                     /* include pci support          */
+#undef  CONFIG_PCI_PNP                 /* do (not) pci plug-and-play   */
+#define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
+#define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT               /* enable board pci_pre_init()  */
+#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #define CFG_PCI_MASTER_INIT
 
-#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
-#define CFG_PCI_SUBSYS_ID 0xcafe       /* Whatever */
+#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
+#define CFG_PCI_SUBSYS_ID       0xcafe /* Whatever */
 
 /*
  * For booting Linux, the board info and command line data
  * the maximum mapped by the Linux kernel during initialization.
  */
 #define CFG_BOOTMAPSZ          (8 << 20)       /* Initial Memory map for Linux */
+
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                8192    /* For IBM 405 CPUs                     */
+#define CFG_DCACHE_SIZE                (32<<10) /* For IBM 440 CPUs                    */
 #define CFG_CACHELINE_SIZE     32      /* ...                  */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
+
 #endif /* __CONFIG_H */