dts:exynos:update pinctrl size-cells and fix child regs

This change is required to avoid warnings about invalid
size-cells defined in device-tree pinctrl nodes for Exynos.

Tested on:
- Odroid U3
- Odroid XU3

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
index 0ff41d00287d2d23702f39bdf7a411831c0ceab6..b76c77d719459fa84d2ee6e16b91308c8b1aff90 100644 (file)
--- a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
@@ -9,21 +9,21 @@
 /{
        pinctrl_0: pinctrl@11400000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                compatible = "samsung,exynos4210-pinctrl";
        };
 
        pinctrl_1: pinctrl@11000000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                gpx0: gpx0 {
-                       reg = <0xc00>;
+                       reg = <0xc00 0x20>;
                };
        };
 
        pinctrl_2: pinctrl@03860000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
 
 };

diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
index 8e5a6c61180a758adc33f1fccd32e8cc78de73b6..33ecc148a79ee78e1d4a0f82005be9f09f5c5787 100644 (file)
--- a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -9,37 +9,37 @@
 /{
        pinctrl_0: pinctrl@11400000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                gpf0: gpf0 {
-                       reg = <0x180>;
+                       reg = <0x180 0x20>;
                };
                gpj0: gpj0 {
-                       reg = <0x240>;
+                       reg = <0x240 0x20>;
                };
        };
 
        pinctrl_1: pinctrl@11000000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                gpk0: gpk0 {
-                       reg = <0x40>;
+                       reg = <0x40 0x20>;
                };
                gpm0: gpm0 {
-                       reg = <0x260>;
+                       reg = <0x260 0x20>;
                };
                gpx0: gpx0 {
-                       reg = <0xc00>;
+                       reg = <0xc00 0x20>;
                };
        };
 
        pinctrl_2: pinctrl@03860000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
 
        pinctrl_3: pinctrl@106E0000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
 
 };

diff --git a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
index 068c5f696fed5e1e1e09a346efacbbcfaa50a04c..b8c0526def4a82bc2a35a85511161c15ca0837d5 100644 (file)
--- a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
@@ -9,34 +9,34 @@
 /{
        pinctrl_0: pinctrl@11400000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                gpc4: gpc4 {
-                       reg = <0x2e0>;
+                       reg = <0x2e0 0x20>;
                };
                gpx0: gpx0 {
-                       reg = <0xc00>;
+                       reg = <0xc00 0x20>;
                };
        };
 
        pinctrl_1: pinctrl@13400000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
 
        pinctrl_2: pinctrl@10d10000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                gpv2: gpv2 {
-                       reg = <0x060>;
+                       reg = <0x060 0x20>;
                };
                gpv4: gpv4 {
-                       reg = <0xc0>;
+                       reg = <0xc0 0x20>;
                };
        };
 
        pinctrl_3: pinctrl@03860000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
 
 };

diff --git a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
index 635a1b0d3a50157bc94e81e01712c6dd6f1e5ffe..341194f5a760798ec07a55352014ddfe36d7167b 100644 (file)
--- a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
@@ -14,29 +14,29 @@
         */
        pinctrl@14010000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
        pinctrl@13400000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                gpy7 {
                };
 
                gpx0 {
-                       reg = <0xc00>;
+                       reg = <0xc00 0x0>;
                };
        };
        pinctrl@13410000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
        pinctrl@14000000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
        pinctrl@03860000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
        };
 
 };

diff --git a/arch/arm/dts/s5pc110-pinctrl.dtsi b/arch/arm/dts/s5pc110-pinctrl.dtsi
index 2e9d552daaf5fe088b51e6aafc4f00d4a624e40c..07e76c098589a276e968ade68a73f1b89bf65d61 100644 (file)
--- a/arch/arm/dts/s5pc110-pinctrl.dtsi
+++ b/arch/arm/dts/s5pc110-pinctrl.dtsi
@@ -9,7 +9,7 @@
 / {
        pinctrl@e0200000 {
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
                gpa0: gpa0 {
                        gpio-controller;
                        #gpio-cells = <2>;
@@ -251,7 +251,7 @@
                };
 
                gph0: gph0 {
-                       reg = <0xc00>;
+                       reg = <0xc00 0x20>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };