"3.1.2"};
#endif /* CONFIG_DISPLAY_CPUINFO */
+/* this is the revision table for 37xx CPUs */
+static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
+ "1.0",
+ "1.1",
+ "1.2"};
+
/*****************************************************************
* dieid_num_r(void) - read and set die ID
*****************************************************************/
sec_s = "?";
}
- printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
+ if (CPU_OMAP36XX == get_cpu_family())
+ printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
+ cpu_family_s, cpu_s, sec_s,
+ rev_s_37xx[get_cpu_rev()], max_clk);
+ else
+ printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
cpu_family_s, cpu_s, sec_s,
rev_s[get_cpu_rev()], max_clk);
#define CPU_3XX_ES312 7
#define CPU_3XX_MAX_REV 8
+/*
+ * 37xx real hardware:
+ * ES1.0 onwards, the value maps to contents of IDCODE register [31:28].
+ */
+
+#define CPU_37XX_ES10 0
+#define CPU_37XX_ES11 1
+#define CPU_37XX_ES12 2
+#define CPU_37XX_MAX_REV 3
+
#define CPU_3XX_ID_SHIFT 28
#define WIDTH_8BIT 0x0000