return get_cpu_rev() & ~(0xF << 8);
}
-#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
-
#ifdef CONFIG_USB_EHCI_MX5
int board_ehci_hcd_init(int port)
{
#include <asm/arch/iomux-mx53.h>
#include <asm/gpio.h>
-#define PPD_UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
- PAD_CTL_PUS_100K_UP)
-
static const iomux_v3_cfg_t ppd_pads[] = {
/* FEC */
MX53_PAD_EIM_A22__GPIO2_16,
- /* UART */
- NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__UART1_RXD_MUX, PPD_UART_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__UART1_TXD_MUX, PPD_UART_PAD_CTRL),
/* Video */
MX53_PAD_CSI0_DATA_EN__GPIO5_20, /* LR_SCAN_CTRL */
MX53_PAD_CSI0_VSYNC__GPIO5_21, /* UD_SCAN_CTRL */
#include <asm/arch/imx-regs.h>
-#define CONSOLE_DEV "ttymxc0"
-
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_REVISION_TAG
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
/* USB Configs */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
"devnum=2\0" \
"rootdev=mmcblk0p\0" \
"quiet=quiet loglevel=0\0" \
- "console=" CONSOLE_DEV "\0" \
"lvds=ldb\0" \
"setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
- "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
- "console=${console}\0" \
+ "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet}\0" \
"bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
"rootwait ${bootargs}\0" \
"doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \