BF537-minotaur BF537
BF537-srv1 BF537
+Wojtek Skulski <skulski@pas.rochester.edu>
+Benjamin Matthews <mben12@gmail.com>
+
+ BLACKSTAMP BF532
+
#########################################################################
# End of MAINTAINERS list #
#########################################################################
bf538f-ezkit \
bf548-ezkit \
bf561-ezkit \
+ blackstamp \
cm-bf527 \
cm-bf533 \
cm-bf537e \
BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf548 cm-bf561 tcm-bf537
# Misc third party boards
-BFIN_BOARDS += bf537-minotaur bf537-srv1
+BFIN_BOARDS += bf537-minotaur bf537-srv1 blackstamp
$(BFIN_BOARDS:%=%_config) : unconfig
@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
$(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \
$(obj)board/bf5{33,37}-stamp/u-boot.lds \
- $(obj)board/bf537-{minotaur,pnav,srv1}/u-boot.lds \
+ $(obj)board/{bf537-{minotaur,pnav,srv1},blackstamp}/u-boot.lds \
$(obj)board/{,t}cm-bf5{27,33,37e,48,61}/u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
--- /dev/null
+/u-boot.lds
--- /dev/null
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y := $(BOARD).o
+
+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+$(obj)u-boot.lds: u-boot.lds.S
+ $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+/*
+ * U-boot - blackstamp.c BlackStamp board specific routines
+ * Most code stolen from boards/bf533-stamp/bf533-stamp.c
+ * Edited to the BlackStamp by Ben Matthews for UR LLE
+ *
+ * Copyright (c) 2005-2009 Analog Devices Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ printf("Board: BlackStamp\n");
+ printf("Support: http://blackfin.uclinux.org/gf/project/blackstamp/\n");
+ return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+ return gd->bd->bi_memsize;
+}
+
+#ifdef SHARED_RESOURCES
+void swap_to(int device_id)
+{
+ bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0);
+ SSYNC();
+ if (device_id == ETHERNET)
+ bfin_write_FIO_FLAG_S(PF0);
+ else if (device_id == FLASH)
+ bfin_write_FIO_FLAG_C(PF0);
+ else
+ printf("Unknown device to switch\n");
+ SSYNC();
+}
+#endif
--- /dev/null
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
--- /dev/null
+/*
+ * U-boot - u-boot.lds.S
+ *
+ * Copyright (c) 2005-2008 Analog Device Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <asm/blackfin.h>
+#undef ALIGN
+#undef ENTRY
+#undef bfin
+
+/* If we don't actually load anything into L1 data, this will avoid
+ * a syntax error. If we do actually load something into L1 data,
+ * we'll get a linker memory load error (which is what we'd want).
+ * This is here in the first place so we can quickly test building
+ * for different CPU's which may lack non-cache L1 data.
+ */
+#ifndef L1_DATA_B_SRAM
+# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
+# define L1_DATA_B_SRAM_SIZE 0
+#endif
+
+OUTPUT_ARCH(bfin)
+
+MEMORY
+{
+ ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
+ l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
+ l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
+}
+
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ cpu/blackfin/start.o (.text .text.*)
+
+#ifdef ENV_IS_EMBEDDED
+ /* WARNING - the following is hand-optimized to fit within
+ * the sector before the environment sector. If it throws
+ * an error during compilation remove an object here to get
+ * it linked after the configuration sector.
+ */
+
+ cpu/blackfin/traps.o (.text .text.*)
+ cpu/blackfin/interrupt.o (.text .text.*)
+ cpu/blackfin/serial.o (.text .text.*)
+ common/dlmalloc.o (.text .text.*)
+ lib_generic/crc32.o (.text .text.*)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/env_embedded.o (.text .text.*)
+#endif
+
+ __initcode_start = .;
+ cpu/blackfin/initcode.o (.text .text.*)
+ __initcode_end = .;
+
+ *(.text .text.*)
+ } >ram
+
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata .rodata.*)
+ *(.rodata1)
+ *(.eh_frame)
+ . = ALIGN(4);
+ } >ram
+
+ .data :
+ {
+ . = ALIGN(256);
+ *(.data .data.*)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ } >ram
+
+ .u_boot_cmd :
+ {
+ ___u_boot_cmd_start = .;
+ *(.u_boot_cmd)
+ ___u_boot_cmd_end = .;
+ } >ram
+
+ .text_l1 :
+ {
+ . = ALIGN(4);
+ __stext_l1 = .;
+ *(.l1.text)
+ . = ALIGN(4);
+ __etext_l1 = .;
+ } >l1_code AT>ram
+ __stext_l1_lma = LOADADDR(.text_l1);
+
+ .data_l1 :
+ {
+ . = ALIGN(4);
+ __sdata_l1 = .;
+ *(.l1.data)
+ *(.l1.bss)
+ . = ALIGN(4);
+ __edata_l1 = .;
+ } >l1_data AT>ram
+ __sdata_l1_lma = LOADADDR(.data_l1);
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss .bss.*)
+ *(COMMON)
+ __bss_end = .;
+ } >ram
+}
--- /dev/null
+/*
+ * U-boot - Configuration file for BlackStamp board
+ * Configuration by Ben Matthews for UR LLE using bf533-stamp.h
+ * as a template
+ * See http://blackfin.uclinux.org/gf/project/blackstamp/
+ */
+
+#ifndef __CONFIG_BLACKSTAMP_H__
+#define __CONFIG_BLACKSTAMP_H__
+
+#include <asm/blackfin-config-pre.h>
+
+/*
+ * Debugging: Set these options if you're having problems
+ */
+/*
+ * #define CONFIG_DEBUG_EARLY_SERIAL
+ * #define DEBUG
+ * #define CONFIG_DEBUG_DUMP
+ * #define CONFIG_DEBUG_DUMP_SYMS
+*/
+#define CONFIG_PANIC_HANG 0
+
+/* CPU Options
+ * Be sure to set the Silicon Revision Correctly
+ */
+#define CONFIG_BFIN_CPU bf532-0.5
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
+
+/*
+ * Board settings
+ */
+#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_SMC91111_BASE 0x20300300
+
+/* FLASH/ETHERNET uses the same address range
+ * Depending on what you have the CPLD doing
+ * this probably isn't needed
+ */
+#define SHARED_RESOURCES 1
+
+/* Is I2C bit-banged? */
+#undef CONFIG_SOFT_I2
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 25000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
+/* 1 = CLKIN / 2 */
+#define CONFIG_CLKIN_HALF 0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
+/* 1 = bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
+/* Values can range from 0-63 (where 0 means 64) */
+#define CONFIG_VCO_MULT 16
+/* CCLK_DIV controls the core clock divider */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* SCLK_DIV controls the system clock divider */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 3
+
+/*
+ * Network settings
+ */
+
+#ifdef CONFIG_DRIVER_SMC91111
+#define CONFIG_IPADDR 192.168.0.15
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_GATEWAYIP 192.168.0.1
+#define CONFIG_SERVERIP 192.168.0.2
+#define CONFIG_HOSTNAME blackstamp
+#define CONFIG_ROOTPATH /checkout/uClinux-dist/romfs
+#define CONFIG_SYS_AUTOLOAD "no"
+
+/* To remove hardcoding and enable MAC storage in EEPROM */
+/* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */
+#endif
+
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x40000
+#define ENV_IS_EMBEDDED_CUSTOM
+
+/*
+ * SDRAM settings & memory map
+ */
+
+#define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */
+#define CONFIG_MEM_ADD_WDTH 10 /* 8, 9, 10, 11 */
+
+#define CONFIG_SYS_MONITOR_LEN (256 << 10)
+#define CONFIG_SYS_MALLOC_LEN (384 << 10)
+
+/*
+ * Command settings
+ */
+
+#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_AUTO_COMPLETE 1
+#define CONFIG_ENV_OVERWRITE 1
+
+#include <config_cmd_default.h>
+
+#ifdef CONFIG_DRIVER_SMC91111
+# define CONFIG_CMD_DHCP
+# define CONFIG_CMD_PING
+#else
+# undef CONFIG_CMD_NET
+#endif
+
+#ifdef CONFIG_SOFT_I2C
+# define CONFIG_CMD_I2C
+#endif
+
+#define CONFIG_CMD_BOOTLDR
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_CPLBINFO
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_ELF
+
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOTCOMMAND "run ramboot"
+#define CONFIG_BOOTARGS \
+ "root=/dev/mtdblock0 rw " \
+ "clkin_hz=" MK_STR(CONFIG_CLKIN_HZ) " " \
+ "earlyprintk=" \
+ "serial," \
+ "uart" MK_STR(CONFIG_UART_CONSOLE) "," \
+ MK_STR(CONFIG_BAUDRATE) " " \
+ "console=ttyBF0," MK_STR(CONFIG_BAUDRATE)
+
+#if defined(CONFIG_CMD_NET)
+# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
+# define UBOOT_ENV_FILE "u-boot.bin"
+# else
+# define UBOOT_ENV_FILE "u-boot.ldr"
+# endif
+# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
+# ifdef CONFIG_SPI
+# define UBOOT_ENV_UPDATE \
+ "eeprom write $(loadaddr) 0x0 $(filesize)"
+# else
+# define UBOOT_ENV_UPDATE \
+ "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \
+ "sf erase 0 0x40000;" \
+ "sf write $(loadaddr) 0 $(filesize)"
+# endif
+# else
+# define UBOOT_ENV_UPDATE \
+ "protect off 0x20000000 0x2003FFFF;" \
+ "erase 0x20000000 0x2003FFFF;" \
+ "cp.b $(loadaddr) 0x20000000 $(filesize)"
+# endif
+# define NETWORK_ENV_SETTINGS \
+ "ubootfile=" UBOOT_ENV_FILE "\0" \
+ "update=" \
+ "tftp $(loadaddr) $(ubootfile);" \
+ UBOOT_ENV_UPDATE \
+ "\0" \
+ "addip=set bootargs $(bootargs) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \
+ "$(hostname):eth0:off" \
+ "\0" \
+ "ramargs=set bootargs " CONFIG_BOOTARGS "\0" \
+ "ramboot=" \
+ "tftp $(loadaddr) uImage;" \
+ "run ramargs;" \
+ "run addip;" \
+ "bootm" \
+ "\0" \
+ "nfsargs=set bootargs " \
+ "root=/dev/nfs rw " \
+ "nfsroot=$(serverip):$(rootpath),tcp,nfsvers=3" \
+ "\0" \
+ "nfsboot=" \
+ "tftp $(loadaddr) vmImage;" \
+ "run nfsargs;" \
+ "run addip;" \
+ "bootm" \
+ "\0"
+#else
+# define NETWORK_ENV_SETTINGS
+#endif
+
+/*
+ * Console settings
+ */
+#define CONFIG_BAUDRATE 57600
+#define CONFIG_LOADS_ECHO 1
+#define CONFIG_UART_CONSOLE 0
+
+/*
+ * I2C settings
+ * By default PF2 is used as SDA and PF3 as SCL on the Stamp board
+ * Located on the expansion connector on pins 86/85
+ * Note these pins are arbitrarily chosen because we aren't using
+ * them yet. You can (and probably should) change these values!
+ */
+#ifdef CONFIG_SOFT_I2C
+
+#define PF_SCL PF9
+#define PF_SDA PF8
+
+#define I2C_INIT do { *pFIO_DIR |= PF_SCL; SSYNC(); } while (0)
+#define I2C_ACTIVE do { *pFIO_DIR |= PF_SDA; *pFIO_INEN &= ~PF_SDA; SSYNC(); } while (0)
+#define I2C_TRISTATE do { *pFIO_DIR &= ~PF_SDA; *pFIO_INEN |= PF_SDA; SSYNC(); } while (0)
+#define I2C_READ ((*pFIO_FLAG_D & PF_SDA) != 0)
+#define I2C_SDA(bit) \
+ do { \
+ if (bit) \
+ *pFIO_FLAG_S = PF_SDA; \
+ else \
+ *pFIO_FLAG_C = PF_SDA; \
+ SSYNC(); \
+ } while (0)
+#define I2C_SCL(bit) \
+ do { \
+ if (bit) \
+ *pFIO_FLAG_S = PF_SCL; \
+ else \
+ *pFIO_FLAG_C = PF_SCL; \
+ SSYNC(); \
+ } while (0)
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+
+#define CONFIG_SYS_I2C_SPEED 50000
+#define CONFIG_SYS_I2C_SLAVE 0xFE
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_RTC_BFIN 1
+
+/*
+ * Serial Flash Infomation
+ */
+#define CONFIG_BFIN_SPI
+/* For the M25P64 SCK Should be Kept < 20Mhz */
+#define CONFIG_ENV_SPI_MAX_HZ 20000000
+#define CONFIG_SF_DEFAULT_HZ 20000000
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+
+/*
+ * FLASH organization and environment definitions
+ */
+
+#define CONFIG_EBIU_AMGCTL_VAL 0xFF
+#define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3
+#define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983
+#define CONFIG_EBIU_SDRRC_VAL 0x268
+#define CONFIG_EBIU_SDGCTL_VAL 0x911109
+
+/* Even though Rev C boards have Parallel Flash
+ * We aren't supporting it. Newer versions of the
+ * hardware don't support Parallel Flash at all.
+ */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_FLASH
+
+#include <asm/blackfin-config-post.h>
+
+#endif
projects / oweals / u-boot.git / commitdiff