*/
struct header1_info {
uint32_t magic;
- uint32_t first_insn;
};
/**
* @spl_hdr: Boot ROM requires a 4-bytes spl header
* @spl_size: Spl size(include extra 4-bytes spl header)
* @spl_rc4: RC4 encode the SPL binary (same key as header)
- * @spl_aarch64: Pad the header with an AArch64 'nop's to 8-bytes
+ * @spl_boot0: A new-style (ARM_SOC_BOOT0_HOOK) image that should
+ * have the boot magic (e.g. 'RK33') written to its first
+ * word.
*/
struct spl_info {
const char *spl_hdr;
const uint32_t spl_size;
const bool spl_rc4;
- const bool spl_aarch64;
+ const bool spl_boot0;
};
static struct spl_info spl_infos[] = {
return info->spl_hdr;
}
-const bool rkcommon_get_spl_hdr_padto8(struct image_tool_params *params)
+
+int rkcommon_get_spl_size(struct image_tool_params *params)
{
struct spl_info *info = rkcommon_get_spl_info(params->imagename);
/*
* info would not be NULL, because of we checked params before.
*/
- return info->spl_aarch64;
+ return info->spl_size;
}
-int rkcommon_get_spl_size(struct image_tool_params *params)
+bool rkcommon_need_rc4_spl(struct image_tool_params *params)
{
struct spl_info *info = rkcommon_get_spl_info(params->imagename);
/*
* info would not be NULL, because of we checked params before.
*/
- return info->spl_size;
+ return info->spl_rc4;
}
-bool rkcommon_need_rc4_spl(struct image_tool_params *params)
+bool rkcommon_spl_is_boot0(struct image_tool_params *params)
{
struct spl_info *info = rkcommon_get_spl_info(params->imagename);
/*
* info would not be NULL, because of we checked params before.
*/
- return info->spl_rc4;
+ return info->spl_boot0;
}
static void rkcommon_set_header0(void *buf, uint file_size,
/* Set up the SPL name and add the AArch64 'nop' padding, if needed */
memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
- /*
- * Pad the 4-byte header to 8-bytes using an AArch64 'nop'.
- * Note that AArch64 insns are always encoded as little-endian.
- */
- if (rkcommon_get_spl_hdr_padto8(params))
- hdr->first_insn = cpu_to_le32(0xd503201f);
-
if (rkcommon_need_rc4_spl(params))
rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
params->file_size - RK_SPL_HDR_START);
* Depending on this, the header is either 0x804 or 0x808 bytes
* in length.
*/
- if (rkcommon_get_spl_hdr_padto8(params))
- tparams->header_size = RK_SPL_HDR_START + 8;
+ if (rkcommon_spl_is_boot0(params))
+ tparams->header_size = RK_SPL_HDR_START;
else
tparams->header_size = RK_SPL_HDR_START + 4;
*/
const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
-/**
- * rkcommon_get_spl_hdr_padto8() - check if we need to pad to 8 bytes
- *
- * Rockchip's bootrom starts execution right after the SPL header (i.e.
- * at offset 4), but we can not reasonably align the test section of
- * an AArch64 SPL at 4 bytes (as this would break natural alignment
- * and any embedded constants might cause an alignment exception, which
- * is illegal in privileged modes).
- *
- * Padding is (for now) assumed to occur with a single AArch64 'nop'.
- */
-const bool rkcommon_get_spl_hdr_padto8(struct image_tool_params *params);
-
/**
* rkcommon_get_spl_size() - get spl size for a Rockchip boot image
*