writel(1 << 2, &fec->eth->x_cntrl);
fec->rbd_index = 0;
+#if defined(CONFIG_MX6Q)
+ /* Enable ENET HW endian SWAP */
+ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_DBSWAP,
+ &fec->eth->ecntrl);
+ /* Enable ENET store and forward mode */
+ writel(readl(&fec->eth->x_wmrk) | FEC_X_WMRK_STRFWD,
+ &fec->eth->x_wmrk);
+#endif
/*
* Enable FEC-Lite controller
*/
rcntrl = PKTSIZE << FEC_RCNTRL_MAX_FL_SHIFT;
if (fec->xcv_type == SEVENWIRE)
rcntrl |= FEC_RCNTRL_FCE;
+ else if (fec->xcv_type == RGMII)
+ rcntrl |= FEC_RCNTRL_RGMII;
else if (fec->xcv_type == RMII)
rcntrl |= FEC_RCNTRL_RMII;
else /* MII mode */
#define FEC_RCNTRL_PROM 0x00000008
#define FEC_RCNTRL_BC_REJ 0x00000010
#define FEC_RCNTRL_FCE 0x00000020
+#define FEC_RCNTRL_RGMII 0x00000040
#define FEC_RCNTRL_RMII 0x00000100
#define FEC_TCNTRL_GTS 0x00000001
#define FEC_ECNTRL_RESET 0x00000001 /* reset the FEC */
#define FEC_ECNTRL_ETHER_EN 0x00000002 /* enable the FEC */
+#define FEC_ECNTRL_DBSWAP 0x00000100
+
+#define FEC_X_WMRK_STRFWD 0x00000100
#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
/* defines for MIIGSK */
SEVENWIRE, /* 7-wire */
MII10, /* MII 10Mbps */
MII100, /* MII 100Mbps */
- RMII /* RMII */
+ RMII, /* RMII */
+ RGMII, /* RGMII */
};
/**