phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID
authorAndrea Merello <andrea.merello@gmail.com>
Thu, 26 May 2016 16:24:28 +0000 (18:24 +0200)
committerJoe Hershberger <joe.hershberger@ni.com>
Thu, 13 Oct 2016 17:24:51 +0000 (12:24 -0500)
This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.

This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)

Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/phy/atheros.c

index e57c4120a3e5b4a55f2b53e110bac70a857a39b8..694a338053ba26669c39cfcac8a98738da3f9361 100644 (file)
@@ -31,6 +31,22 @@ static int ar8035_config(struct phy_device *phydev)
        regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
        phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100));
 
+       if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
+           (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
+               /* select debug reg 5 */
+               phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x5);
+               /* enable tx delay */
+               phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x0100);
+       }
+
+       if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
+           (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) {
+               /* select debug reg 0 */
+               phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x0);
+               /* enable rx delay */
+               phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x8000);
+       }
+
        phydev->supported = phydev->drv->features;
 
        genphy_config_aneg(phydev);