Comply with updated x86cpuid.pl.

diff --git a/crypto/rc4/rc4_skey.c b/crypto/rc4/rc4_skey.c
index b22c40b0bd0641c57bdf8b3eab439d9e6fe551d8..46b77ec32169e5ded4fdc3ce9b25f222f9617643 100644 (file)
--- a/crypto/rc4/rc4_skey.c
+++ b/crypto/rc4/rc4_skey.c
@@ -119,14 +119,15 @@ void RC4_set_key(RC4_KEY *key, int len, const unsigned char *data)
                 * implementations suffer from significant performance
                 * losses then, e.g. PIII exhibits >2x deterioration,
                 * and so does Opteron. In order to assure optimal
-                * all-round performance, let us [try to] detect P4 at
-                * run-time by checking upon HTT bit in CPU capability
+                * all-round performance, we detect P4 at run-time by
+                * checking upon reserved bit 20 in CPU capability
                 * vector and set up compressed key schedule, which is
                 * recognized by correspondingly updated assembler
-                * module...
+                * module... Bit 20 is set up by OPENSSL_ia32_cpuid.
+                *
                 *                              <appro@fy.chalmers.se>
                 */
-               if (OPENSSL_ia32cap_P & (1<<28)) {
+               if (OPENSSL_ia32cap_P & (1<<20)) {
                        unsigned char *cp=(unsigned char *)d;
 
                        for (i=0;i<256;i++) cp[i]=i;