rockchip: rk3328: migrate u-boot node to -u-boot.dtsi
authorKever Yang <kever.yang@rock-chips.com>
Thu, 15 Aug 2019 03:40:56 +0000 (11:40 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 23 Aug 2019 07:27:40 +0000 (15:27 +0800)
Move all the nodes only shown in u-boot to -u-boot.dtsi to make
rk3328.dtsi clean.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3328-evb-u-boot.dtsi
arch/arm/dts/rk3328-evb.dts
arch/arm/dts/rk3328-rock64-u-boot.dtsi
arch/arm/dts/rk3328-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/rk3328.dtsi

index 58ebf52b4bf5e3aa43a596339e867fe9db421af5..4a827063c55571f3ef50139890e590464c9b0674 100644 (file)
@@ -1,33 +1,12 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2016-2019 Rockchip Electronics Co., Ltd
  */
 
+#include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr3-666.dtsi"
 
-/ {
-       aliases {
-               mmc0 = &emmc;
-               mmc1 = &sdmmc;
-       };
-
-       chosen {
-               u-boot,spl-boot-order = &emmc, &sdmmc;
-       };
-};
-
-&cru {
-       u-boot,dm-pre-reloc;
-};
-
-&uart2 {
-       u-boot,dm-pre-reloc;
-};
-
-&emmc {
-       u-boot,dm-pre-reloc;
-};
-
-&sdmmc {
-       u-boot,dm-pre-reloc;
+&usb_host0_xhci {
+       vbus-supply = <&vcc5v0_host_xhci>;
+       status = "okay";
 };
index ec594a8452eb62a1671948be323294b0a10fc1d2..a2ee838fcd6baeed47d81577afdf9cee59383cd2 100644 (file)
        status = "okay";
 };
 
-&usb_host0_xhci {
-       vbus-supply = <&vcc5v0_host_xhci>;
-       status = "okay";
-};
-
 &i2c1 {
        clock-frequency = <400000>;
        i2c-scl-rising-time-ns = <168>;
index 21c2afca3c02dbef652a4bfb7ba14993992e5034..1d441f7124f4ad7c9cb685b9895ef5258079bced 100644 (file)
@@ -1,38 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
  */
 
+#include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-lpddr3-1600.dtsi"
 
-/ {
-       aliases {
-               mmc0 = &emmc;
-               mmc1 = &sdmmc;
-       };
-
-       chosen {
-               u-boot,spl-boot-order = &emmc, &sdmmc;
-       };
-};
-
-&cru {
-       u-boot,dm-pre-reloc;
-};
-
-&uart2 {
-       u-boot,dm-pre-reloc;
-};
-
-&emmc {
-       u-boot,dm-pre-reloc;
-};
-
-&sdmmc {
-       u-boot,dm-pre-reloc;
-};
-
 &usb_host0_xhci {
        status = "okay";
 };
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
new file mode 100644 (file)
index 0000000..ffbd657
--- /dev/null
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+/ {
+       aliases {
+               mmc0 = &emmc;
+               mmc1 = &sdmmc;
+       };
+
+       chosen {
+               u-boot,spl-boot-order = &emmc, &sdmmc;
+       };
+
+       dmc: dmc {
+               u-boot,dm-pre-reloc;
+               compatible = "rockchip,rk3328-dmc";
+               reg = <0x0 0xff400000 0x0 0x1000
+                      0x0 0xff780000 0x0 0x3000
+                      0x0 0xff100000 0x0 0x1000
+                      0x0 0xff440000 0x0 0x1000
+                      0x0 0xff720000 0x0 0x1000
+                      0x0 0xff798000 0x0 0x1000>;
+       };
+
+       usb_host0_xhci: usb@ff600000 {
+               compatible = "rockchip,rk3328-xhci";
+               reg = <0x0 0xff600000 0x0 0x100000>;
+               interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+               snps,dis-enblslpm-quirk;
+               snps,phyif-utmi-bits = <16>;
+               snps,dis-u2-freeclk-exists-quirk;
+               snps,dis-u2-susphy-quirk;
+               status = "disabled";
+       };
+};
+
+&cru {
+       u-boot,dm-pre-reloc;
+};
+
+&grf {
+       u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+       u-boot,dm-pre-reloc;
+       clock-frequency = <24000000>;
+};
+
+&emmc {
+       u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+       u-boot,dm-pre-reloc;
+};
index a080ae8d69742822a3260ff642bd747ab50a9788..060c84e6c0cfc38cd710da04d941c5b2f9d21a73 100644 (file)
        };
 
        grf: syscon@ff100000 {
-               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
                reg = <0x0 0xff100000 0x0 0x1000>;
 
                interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
                clock-names = "baudclk", "apb_pclk";
-               clock-frequency = <24000000>;
                reg-shift = <2>;
                reg-io-width = <4>;
                dmas = <&dmac 6>, <&dmac 7>;
                status = "disabled";
        };
 
-       dmc: dmc {
-               u-boot,dm-pre-reloc;
-               compatible = "rockchip,rk3328-dmc";
-               reg = <0x0 0xff400000 0x0 0x1000
-                      0x0 0xff780000 0x0 0x3000
-                      0x0 0xff100000 0x0 0x1000
-                      0x0 0xff440000 0x0 0x1000
-                      0x0 0xff720000 0x0 0x1000
-                      0x0 0xff798000 0x0 0x1000>;
-       };
-
        cru: clock-controller@ff440000 {
                compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
                reg = <0x0 0xff440000 0x0 0x1000>;
                status = "disabled";
        };
 
-       usb_host0_xhci: usb@ff600000 {
-               compatible = "rockchip,rk3328-xhci";
-               reg = <0x0 0xff600000 0x0 0x100000>;
-               interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
-               snps,dis-enblslpm-quirk;
-               snps,phyif-utmi-bits = <16>;
-               snps,dis-u2-freeclk-exists-quirk;
-               snps,dis-u2-susphy-quirk;
-               status = "disabled";
-       };
-
        gic: interrupt-controller@ffb70000 {
                compatible = "arm,gic-400";
                #interrupt-cells = <3>;