phy-handle = <&phy0>;
phy-mode = "sgmii";
is-internal-pcspma;
- phy0: phy@0 { /* marwell m88e1512 */
+ phy0: ethernet-phy@0 { /* marwell m88e1512 */
reg = <0>;
reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
/* xlnx,phy-type = <PHY_TYPE_SGMII>; */
phy-handle = <&phy0>;
phy-mode = "sgmii"; /* DTG generates this properly 1512 */
phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
- phy0: phy@0 { /* marwell m88e1512 - SGMII */
+ phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
reg = <0>;
/* xlnx,phy-type = <PHY_TYPE_SGMII>; */
};
phy-mode = "sgmii"; /* DTG generates this properly 1512 */
is-internal-pcspma;
/* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
- phy0: phy@0 {
+ phy0: ethernet-phy@0 {
reg = <0>;
};
};
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@0 {
+ phy0: ethernet-phy@0 {
reg = <0>;
};
};
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@5 {
+ phy0: ethernet-phy@5 {
reg = <5>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@0 { /* VSC8211 */
+ phy0: ethernet-phy@0 { /* VSC8211 */
reg = <0>;
};
};
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@0 {
+ phy0: ethernet-phy@0 {
reg = <0>;
};
};
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@21 {
+ phy0: ethernet-phy@21 {
reg = <21>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
&gem3 {
phy-handle = <&phyc>;
- phyc: phy@c {
+ phyc: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@c {
+ phy0: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@c {
+ phy0: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@c {
+ phy0: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@c {
+ phy0: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;