/*
* Stop I2C transaction
*/
-void i2c_imx_stop(void)
+static void i2c_imx_stop(struct mxc_i2c_regs *i2c_regs)
{
int ret;
- struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
unsigned int temp = readb(&i2c_regs->i2cr);
temp &= ~(I2CR_MSTA | I2CR_MTX);
ret = i2c_init_transfer_(i2c_regs, chip, addr, alen);
if (ret >= 0)
return 0;
- i2c_imx_stop();
+ i2c_imx_stop(i2c_regs);
if (ret == -ENODEV)
return ret;
ret = tx_byte(i2c_regs, (chip << 1) | 1);
if (ret < 0) {
- i2c_imx_stop();
+ i2c_imx_stop(i2c_regs);
return ret;
}
for (i = 0; i < len; i++) {
ret = wait_for_sr_state(i2c_regs, ST_IIF);
if (ret < 0) {
- i2c_imx_stop();
+ i2c_imx_stop(i2c_regs);
return ret;
}
* controller from generating another clock cycle
*/
if (i == (len - 1)) {
- i2c_imx_stop();
+ i2c_imx_stop(i2c_regs);
} else if (i == (len - 2)) {
temp = readb(&i2c_regs->i2cr);
temp |= I2CR_TX_NO_AK;
writeb(0, &i2c_regs->i2sr);
buf[i] = readb(&i2c_regs->i2dr);
}
-
- i2c_imx_stop();
-
+ i2c_imx_stop(i2c_regs);
return 0;
}
if (ret < 0)
break;
}
-
- i2c_imx_stop();
-
+ i2c_imx_stop(i2c_regs);
return ret;
}