pinctrl_select_state(dev, "default");
/*
- * Load, start up, and configure system controller firmware. Provide
- * the U-Boot console init function to the SYSFW post-PM configuration
- * callback hook, effectively switching on (or over) the console
- * output.
+ * Load, start up, and configure system controller firmware while
+ * also populating the SYSFW post-PM configuration callback hook.
*/
- k3_sysfw_loader(preloader_console_init);
+ k3_sysfw_loader(k3_mmc_stop_clock, k3_mmc_restart_clock);
+
+ /* Prepare console output */
+ preloader_console_init();
/* Disable ROM configured firewalls right after loading sysfw */
#ifdef CONFIG_TI_SECURE_DEVICE
#include <dm.h>
#include <dm/uclass-internal.h>
#include <dm/pinctrl.h>
+#include <mmc.h>
+ #include <remoteproc.h>
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_K3_LOAD_SYSFW
}
#endif
-void k3_sysfw_loader(void (*config_pm_done_callback)(void))
+ #if CONFIG_IS_ENABLED(SPI_LOAD)
+ static void *k3_sysfw_get_spi_addr(void)
+ {
+ struct udevice *dev;
+ fdt_addr_t addr;
+ int ret;
+
+ ret = uclass_find_device_by_seq(UCLASS_SPI, CONFIG_SF_DEFAULT_BUS,
+ true, &dev);
+ if (ret)
+ return NULL;
+
+ addr = dev_read_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return NULL;
+
+ return (void *)(addr + CONFIG_K3_SYSFW_IMAGE_SPI_OFFS);
+ }
+ #endif
+
+void k3_sysfw_loader(void (*config_pm_pre_callback) (void),
+ void (*config_pm_done_callback)(void))
{
struct spl_image_info spl_image = { 0 };
struct spl_boot_device bootdev = { 0 };
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+ CONFIG_SPL_SPI_FLASH_SUPPORT=y
+ CONFIG_SPL_SPI_SUPPORT=y
# CONFIG_PSCI_RESET is not set
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+ CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_EARLY_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+ CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
+ CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_RESET=y