rockchip: rk3288: add fastboot support
authorXu Ziyuan <xzy.xu@rock-chips.com>
Thu, 14 Jul 2016 16:26:59 +0000 (00:26 +0800)
committerSimon Glass <sjg@chromium.org>
Tue, 26 Jul 2016 02:44:19 +0000 (20:44 -0600)
Enable fastboot feature on rk3288.

This path doesn't support the fastboot flash function command entirely.
We will hit "cannot find partition" assertion without specified
partition environment. Define gpt partition layout in specified board
such as firefly-rk3288, then enjoy it!

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/rk3288.dtsi
arch/arm/mach-rockchip/board.c
include/configs/rk3288_common.h

index 3dab0fc83ead0f70f0b2e99e4e3157eccbb46a27..bcf051a9d9b374b31aed4ec7894c6d466851c551 100644 (file)
                interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru HCLK_OTG0>;
                clock-names = "otg";
+               dr_mode = "otg";
                phys = <&usbphy0>;
                phy-names = "usb2-phy";
                status = "disabled";
index b07e0738eab30073642c026993fff906de7ffa77..f662b26938aa148a1d9ac982cd64678ab6d74fb3 100644 (file)
@@ -85,6 +85,78 @@ void lowlevel_init(void)
 {
 }
 
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3288_otg_data = {
+       .rx_fifo_sz     = 512,
+       .np_tx_fifo_sz  = 16,
+       .tx_fifo_sz     = 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+       int node, phy_node;
+       const char *mode;
+       bool matched = false;
+       const void *blob = gd->fdt_blob;
+       u32 grf_phy_offset;
+
+       /* find the usb_otg node */
+       node = fdt_node_offset_by_compatible(blob, -1,
+                                       "rockchip,rk3288-usb");
+
+       while (node > 0) {
+               mode = fdt_getprop(blob, node, "dr_mode", NULL);
+               if (mode && strcmp(mode, "otg") == 0) {
+                       matched = true;
+                       break;
+               }
+
+               node = fdt_node_offset_by_compatible(blob, node,
+                                       "rockchip,rk3288-usb");
+       }
+       if (!matched) {
+               debug("Not found usb_otg device\n");
+               return -ENODEV;
+       }
+       rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+       node = fdtdec_lookup_phandle(blob, node, "phys");
+       if (node <= 0) {
+               debug("Not found usb phy device\n");
+               return -ENODEV;
+       }
+
+       phy_node = fdt_parent_offset(blob, node);
+       if (phy_node <= 0) {
+               debug("Not found usb phy device\n");
+               return -ENODEV;
+       }
+
+       rk3288_otg_data.phy_of_node = phy_node;
+       grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
+
+       /* find the grf node */
+       node = fdt_node_offset_by_compatible(blob, -1,
+                                       "rockchip,rk3288-grf");
+       if (node <= 0) {
+               debug("Not found grf device\n");
+               return -ENODEV;
+       }
+       rk3288_otg_data.regs_phy = grf_phy_offset +
+                               fdtdec_get_addr(blob, node, "reg");
+
+       return dwc2_udc_probe(&rk3288_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+       return 0;
+}
+#endif
+
 static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
                       char * const argv[])
 {
index 90473bfec504996ebdd7f7780f2347157140c451..2a36c1706bd447443190b48bfb82e66236f7990b 100644 (file)
 #define CONFIG_SPI
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
+/* usb otg */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_DWC2_OTG
+#define CONFIG_ROCKCHIP_USB2_PHY
+#define CONFIG_USB_GADGET_VBUS_DRAW    0
+
+/* fastboot  */
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV  1       /* eMMC */
+/* stroe safely fastboot buffer data to the middle of bank */
+#define CONFIG_FASTBOOT_BUF_ADDR       (CONFIG_SYS_SDRAM_BASE \
+                                       + SDRAM_BANK_SIZE / 2)
+#define CONFIG_FASTBOOT_BUF_SIZE       0x08000000
+
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_G_DNL_MANUFACTURER      "Rockchip"
+#define CONFIG_G_DNL_VENDOR_NUM                0x2207
+#define CONFIG_G_DNL_PRODUCT_NUM       0x320a
+
+/* Enable gpt partition table */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>