Replace CONFIG_MPC8544 with ARCH_MPC8544 in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
config TARGET_SOCRATES
bool "Support socrates"
+ select ARCH_MPC8544
config TARGET_B4860QDS
bool "Support B4860QDS"
config TARGET_MPC8544DS
bool "Support MPC8544DS"
+ select ARCH_MPC8544
config TARGET_MPC8548CDS
bool "Support MPC8548CDS"
endchoice
+config ARCH_MPC8544
+ bool
+
config ARCH_MPC8548
bool
# SoC specific SERDES support
obj-$(CONFIG_PPC_C29X) += c29x_serdes.o
obj-$(CONFIG_MPC8536) += mpc8536_serdes.o
-obj-$(CONFIG_MPC8544) += mpc8544_serdes.o
+obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
obj-$(CONFIG_MPC8568) += mpc8568_serdes.o
obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
int get_clocks (void)
{
sys_info_t sys_info;
-#ifdef CONFIG_MPC8544
+#ifdef CONFIG_ARCH_MPC8544
volatile ccsr_gur_t *gur = (void *) CONFIG_SYS_MPC85xx_GUTS_ADDR;
#endif
#if defined(CONFIG_CPM2)
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) || \
defined(CONFIG_P1022)
gd->arch.i2c1_clk = sys_info.freq_systembus;
-#elif defined(CONFIG_MPC8544)
+#elif defined(CONFIG_ARCH_MPC8544)
/*
* On the 8544, the I2C clock is the same as the SEC clock. This can be
* either CCB/2 or CCB/3, depending on the value of cfg_sec_freq. See
#define CONFIG_SYS_FSL_SEC_COMPAT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
-#elif defined(CONFIG_MPC8544)
+#elif defined(CONFIG_ARCH_MPC8544)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 10
#define CONFIG_SYS_FSL_DDRC_GEN2
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
-#define CONFIG_MPC8544 1
#define CONFIG_MPC8544DS 1
#ifndef CONFIG_SYS_TEXT_BASE
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
-#define CONFIG_MPC8544 1
#define CONFIG_SOCRATES 1
#define CONFIG_SYS_TEXT_BASE 0xfff80000
CONFIG_MPC8540ADS
CONFIG_MPC8541
CONFIG_MPC8541CDS
-CONFIG_MPC8544
CONFIG_MPC8544DS
CONFIG_MPC855
CONFIG_MPC8555