ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 2

If d != 0 after sdr_working_phase() finishes, the else branch
of the condition has no impact on anything at all, since work_end
was already set independently of the value of "d" . Zap this
useless code.

Signed-off-by: Marek Vasut <marex@denx.de>

diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index a9f31d423bf8fdb80644f4351cc05f43af2f890a..16d09c12645f85f2937772b32ea40f1c8afe7a43 100644 (file)
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -1630,16 +1630,6 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(u32 grp)
 
                debug_cond(DLEVEL == 2, "%s:%d p: ptap=%u\n",
                           __func__, __LINE__, p);
-       } else {
-               /*
-                * Step 3-5b: Find the right edge of the window
-                *            using delay taps.
-                */
-               debug_cond(DLEVEL == 2,
-                          "%s:%d ptap=%u dtap=%u bgn=%u\n",
-                          __func__, __LINE__, p, d, work_bgn);
-
-               work_end = work_bgn;
        }
 
        /* The dtap increment to find the failing edge is done here. */