powerpc: MPC8569: Remove macro CONFIG_MPC8569
authorYork Sun <york.sun@nxp.com>
Wed, 16 Nov 2016 19:34:52 +0000 (11:34 -0800)
committerYork Sun <york.sun@nxp.com>
Thu, 24 Nov 2016 07:42:06 +0000 (23:42 -0800)
Replace CONFIG_MPC8569 with ARCH_MPC8569 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/Kconfig
arch/powerpc/cpu/mpc85xx/Makefile
arch/powerpc/cpu/mpc85xx/speed.c
arch/powerpc/cpu/mpc85xx/start.S
arch/powerpc/include/asm/config_mpc85xx.h
arch/powerpc/include/asm/immap_85xx.h
include/configs/MPC8569MDS.h
scripts/config_whitelist.txt

index 9545793d3c654c44c002f0c49c85a54fce953de1..b58ccee68cdf4ae4f3bbba28a295bfab7134dc2d 100644 (file)
@@ -88,6 +88,7 @@ config TARGET_MPC8568MDS
 
 config TARGET_MPC8569MDS
        bool "Support MPC8569MDS"
+       select ARCH_MPC8569
 
 config TARGET_MPC8572DS
        bool "Support MPC8572DS"
@@ -219,6 +220,9 @@ config ARCH_MPC8560
 config ARCH_MPC8568
        bool
 
+config ARCH_MPC8569
+       bool
+
 source "board/freescale/b4860qds/Kconfig"
 source "board/freescale/bsc9131rdb/Kconfig"
 source "board/freescale/bsc9132qds/Kconfig"
index 390eede17460fced2327487fb06de963c567d614..9df14349c013ac68ed9264813fb3ee746acf8a66 100644 (file)
@@ -70,7 +70,7 @@ obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o
 obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
 obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
 obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o
-obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
+obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
 obj-$(CONFIG_MPC8572) += mpc8572_serdes.o
 obj-$(CONFIG_P1010)    += p1010_serdes.o
 obj-$(CONFIG_P1011)    += p1021_serdes.o
index a7f43b65424346df9cd88dea8fa75ef85cdb082c..3ac358034e963d3781e895d6ad2a02fd001fe73f 100644 (file)
@@ -707,7 +707,7 @@ int get_clocks (void)
 #ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
        gd->arch.sdhc_clk = sys_info.freq_sdhc / 2;
 #else
-#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\
+#if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_P1010) ||\
        defined(CONFIG_P1014)
        gd->arch.sdhc_clk = gd->bus_clk;
 #else
index c3e12349f7fc53ec79368e9fb8d2d9c4accf18dc..5f8881df64eddc8aed5fb0e74f5975c5aec047a3 100644 (file)
@@ -345,7 +345,7 @@ l2_disabled:
        mtspr   DBCR0,r0
 #endif
 
-#ifdef CONFIG_MPC8569
+#ifdef CONFIG_ARCH_MPC8569
 #define CONFIG_SYS_LBC_ADDR (CONFIG_SYS_CCSRBAR_DEFAULT + 0x5000)
 #define CONFIG_SYS_LBCR_ADDR (CONFIG_SYS_LBC_ADDR + 0xd0)
 
@@ -376,7 +376,7 @@ l2_disabled:
        tlbivax 0,r4
        isync
 
-#endif /* CONFIG_MPC8569 */
+#endif /* CONFIG_ARCH_MPC8569 */
 
 /*
  * Search for the TLB that covers the code we're executing, and shrink it
index c38d983d4734c0fbc8f49a282229eecc9c64628c..c162c9d3e90333260bbce44ab86b01a5b7f6e8ea 100644 (file)
 #define CONFIG_SYS_FSL_RMU
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM       2
 
-#elif defined(CONFIG_MPC8569)
+#elif defined(CONFIG_ARCH_MPC8569)
 #define CONFIG_MAX_CPUS                        1
 #define CONFIG_SYS_FSL_NUM_LAWS                10
 #define CONFIG_SYS_FSL_SEC_COMPAT      2
index ec4c837d2178aa699c03fa5c9e6942a806e5d06b..123dcad4a13750ba1b54ddf55cc8773e9a5dd5d1 100644 (file)
@@ -2210,7 +2210,7 @@ typedef struct ccsr_gur {
        u32     gpiocr;         /* GPIO control */
 #endif
        u8      res3[12];
-#if defined(CONFIG_MPC8569)
+#if defined(CONFIG_ARCH_MPC8569)
        u32     plppar1;        /* Platform port pin assignment 1 */
        u32     plppar2;        /* Platform port pin assignment 2 */
        u32     plpdir1;        /* Platform port pin direction 1 */
@@ -2484,7 +2484,7 @@ typedef struct ccsr_gur {
        u32     svr;            /* System version */
        u8      res10[8];
        u32     rstcr;          /* Reset control */
-#if defined(CONFIG_ARCH_MPC8568) || defined(CONFIG_MPC8569)
+#if defined(CONFIG_ARCH_MPC8568) || defined(CONFIG_ARCH_MPC8569)
        u8      res11a[76];
        par_io_t qe_par_io[7];
        u8      res11b[1600];
index a2ec52b7301ae0a3e63c2fb89be87ca95d89bdd2..2da630cebf001b8c7694bac973cd209f168c9d54 100644 (file)
@@ -13,7 +13,6 @@
 /* High Level Configuration Options */
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
-#define CONFIG_MPC8569         1       /* MPC8569 specific */
 #define CONFIG_MPC8569MDS      1       /* MPC8569MDS board specific */
 
 #define CONFIG_FSL_ELBC                1       /* Has Enhance localbus controller */
index 020bbcc1efd3533323c440174e4fd110f71415dc..fdd9ce25e6af3c1fb285f550b4f182b2e477edee 100644 (file)
@@ -3141,7 +3141,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_VALUE
 CONFIG_MPC83XX_PCI2
 CONFIG_MPC850
 CONFIG_MPC855
-CONFIG_MPC8569
 CONFIG_MPC8569MDS
 CONFIG_MPC857
 CONFIG_MPC8572