board: sama5d2_xplained: Make SPL work on spiflash

Because before switching to a lower clock source, we must switch
the clock source first instead of last. So before configuring the
PMC_MCKR register, invoke at91_mck_init_down() first.

As said in datasheet, the the size of SPL must not exceed the maximum
size allowed(64Kbytes).

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 7e0cb4228f569e0d24903ca3ade2248587c6f662..57586530304531880c6a6f7b702b6d1b9d09c048 100644 (file)
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -247,6 +247,16 @@ void at91_pmc_init(void)
        struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
        u32 tmp;
 
+       /*
+        * while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz
+        * so we need to slow down and configure MCKR accordingly.
+        * This is why we have a special flavor of the switching function.
+        */
+       tmp = AT91_PMC_MCKR_PLLADIV_2 |
+             AT91_PMC_MCKR_MDIV_3 |
+             AT91_PMC_MCKR_CSS_MAIN;
+       at91_mck_init_down(tmp);
+
        tmp = AT91_PMC_PLLAR_29 |
              AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
              AT91_PMC_PLLXR_MUL(82) |

diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index 891218d83ef0d9ab9d5eba62324bf461377b9a47..aedd5684c408a6586d3e6dd50fa5725239e768b3 100644 (file)
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -61,7 +61,7 @@
 /* SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x200000
-#define CONFIG_SPL_MAX_SIZE            0x18000
+#define CONFIG_SPL_MAX_SIZE            0x10000
 #define CONFIG_SPL_BSS_START_ADDR      0x20000000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 #define CONFIG_SYS_SPL_MALLOC_START    0x20080000