Add support for TP-Link TL-WR841N/D v10 (v9 clone, only higher CPU clock)

diff --git a/Makefile b/Makefile
index fc9d5f93d367051370705672f578f36e55b6bda1..319b888aaf8c63fb36b58f1804dc57402c1b80da 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -209,6 +209,7 @@ COMMON_ETHS27_TARGETS = \
        tp-link_tl-wdr3500 \
        tp-link_tl-wr802n \
        tp-link_tl-wr820n_CN \
+       tp-link_tl-wr841n_v10 \
        tp-link_tl-wr841n_v8 \
        tp-link_tl-wr841n_v9
 

diff --git a/u-boot/Makefile b/u-boot/Makefile
index 5671d0101e6f9319decaccfa269e8751e22be03a..cbb40b8cd421e7ba9217587fcf16b984ce9cd167 100644 (file)
--- a/u-boot/Makefile
+++ b/u-boot/Makefile
@@ -549,6 +549,13 @@ tp-link_tl-wr820n_CN: qca953x_common
        @$(call define_add,CFG_ATH_GMAC_NMACS,2)
        @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
 
+tp-link_tl-wr841n_v10: qca953x_common
+       @$(call config_init,TP-Link TL-WR841N/D v10,tl-wr841nd-v10,4,12,1,QCA_QCA953X_SOC)
+       @$(call define_add,CONFIG_FOR_TPLINK_WR841N_V10,1)
+       @$(call define_add,CFG_ATHRS27_PHY,1)
+       @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+       @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
 tp-link_tl-wr841n_v8: ar934x_common
        @$(call config_init,TP-Link TL-WR841N/D v8,tl-wr841nd-v8,4,17,1,QCA_AR9341_SOC)
        @$(call define_add,CONFIG_FOR_TPLINK_WR841N_V8,1)

diff --git a/u-boot/include/configs/ap143.h b/u-boot/include/configs/ap143.h
index cc61e260991f889779d00ebf2f99df58d306cbe4..ead9ce80900d3d3d1cfab3e96ed1f6532d7b83ff 100644 (file)
--- a/u-boot/include/configs/ap143.h
+++ b/u-boot/include/configs/ap143.h
@@ -55,7 +55,8 @@
        #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
        #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 
-#elif defined(CONFIG_FOR_TPLINK_WR841N_V9)
+#elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+      defined(CONFIG_FOR_TPLINK_WR841N_V9)
 
        #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
                                                GPIO13 | GPIO14 | GPIO15 |\
@@ -115,7 +116,8 @@
                                "rootfstype=squashfs init=/sbin/init "\
                                "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 
-#elif defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
+#elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+      defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
       defined(CONFIG_FOR_TPLINK_WR802N)
 
        #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
@@ -146,8 +148,9 @@
     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
-    defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
+    defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
+    defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CFG_LOAD_ADDR   0x9F020000
 #elif defined(CONFIG_FOR_WALLYS_DR531)
@@ -171,8 +174,9 @@
        #define CFG_ENV_ADDR            0x9F018000
        #define CFG_ENV_SIZE            0x7C00
        #define CFG_ENV_SECT_SIZE       0x10000
-#elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
-      defined(CONFIG_FOR_TPLINK_WR802N)    ||\
+#elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
+      defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
+      defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CFG_ENV_ADDR            0x9F01EC00
        #define CFG_ENV_SIZE            0x1000
@@ -209,8 +213,9 @@
        #define OFFSET_MAC_DATA_BLOCK           0x10000
        #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
        #define OFFSET_MAC_ADDRESS              0x00000
-#elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
-      defined(CONFIG_FOR_TPLINK_WR802N)    ||\
+#elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
+      defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
+      defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define OFFSET_MAC_DATA_BLOCK           0x010000
        #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
@@ -264,8 +269,9 @@
     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
-    defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
+    defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
+    defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 #elif defined(CONFIG_FOR_WALLYS_DR531)  ||\
@@ -279,8 +285,8 @@
  * PLL/Clocks configuration
  * ========================
  */
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
-    defined(CONFIG_FOR_TPLINK_WR802N)    ||\
+#if defined(CONFIG_FOR_TPLINK_WR802N)    ||\
+    defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 #else
@@ -291,8 +297,9 @@
     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
-    defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
+    defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
+    defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 
        #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000