sh7763rdp \
sh7785lcr \
ap325rxa \
+ espt \
"
LIST_sh=" \
xtract_sh7785lcr = $(subst _32bit,,$(subst _config,,$1))
sh7785lcr_32bit_config \
sh7785lcr_config : unconfig
- @ >include/config.h
- @echo "#define CONFIG_SH7785LCR 1" >> include/config.h
+ @mkdir -p $(obj)include
+ @mkdir -p $(obj)board/renesas/sh7785lcr
+ @echo "#define CONFIG_SH7785LCR 1" > $(obj)include/config.h
@if [ "$(findstring 32bit, $@)" ] ; then \
echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \
- cp $(obj)board/renesas/sh7785lcr/u-boot_32bit \
- $(obj)board/renesas/sh7785lcr/u-boot.lds ; \
echo "TEXT_BASE = 0x8ff80000" > \
$(obj)board/renesas/sh7785lcr/config.tmp ; \
$(XECHO) " ... enable 32-Bit Address Extended Mode" ; \
- else \
- cp $(obj)board/renesas/sh7785lcr/u-boot_29bit \
- $(obj)board/renesas/sh7785lcr/u-boot.lds ; \
fi
@$(MKCONFIG) -a $(call xtract_sh7785lcr,$@) sh sh4 sh7785lcr renesas
@echo "#define CONFIG_AP325RXA 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ap325rxa renesas
+espt_config : unconfig
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_ESPT 1" > $(obj)include/config.h
+ @$(MKCONFIG) -a $(@:_config=) sh sh4 espt
+
#========================================================================
# SPARC
#========================================================================
--- /dev/null
+#
+# Copyright (C) 2009 Renesas Solutions Corp.
+# Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+#
+# board/espt/Makefile
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := espt.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+#
+# board/espt/config.mk
+#
+# TEXT_BASE refers to image _after_ relocation.
+#
+# NOTE: Must match value used in u-boot.lds (in this directory).
+#
+
+TEXT_BASE = 0x8FFC0000
--- /dev/null
+/*
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * board/espt/espt.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+
+int checkboard(void)
+{
+ puts("BOARD: ESPT-GIGA\n");
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+ printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
+ return 0;
+}
+
+void led_set_state(unsigned short value)
+{
+}
--- /dev/null
+/*
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * board/espt/lowlevel_init.S
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/processor.h>
+#include <asm/macro.h>
+
+ .global lowlevel_init
+
+ .text
+ .align 2
+
+lowlevel_init:
+
+ write32 WDTCSR_A, WDTCSR_D
+
+ write32 WDTST_A, WDTST_D
+
+ write32 WDTBST_A, WDTBST_D
+
+ write32 CCR_A, CCR_CACHE_ICI_D
+
+ write32 MMUCR_A, MMU_CONTROL_TI_D
+
+ write32 MSTPCR0_A, MSTPCR0_D
+
+ write32 MSTPCR1_A, MSTPCR1_D
+
+ write32 RAMCR_A, RAMCR_D
+
+ /*
+ * Setting infomation from
+ * original ESPT-GIGA bootloader register
+ */
+ write32 MMSEL_A, MMSEL_D
+
+ /* dummy */
+ mov.l @r1, r2
+ mov.l @r1, r2
+ synco
+
+ write32 BCR_A, BCR_D
+
+ write32 CS0BCR_A, CS0BCR_D
+
+ write32 CS0WCR_A, CS0WCR_D
+
+ /*
+ * DDR-SDRAM setting
+ */
+
+ /* set DDR-SDRAM dummy read */
+ write32 MMSEL_A, MMSEL_D
+
+ mov.l MMSEL_A, r0
+ synco
+ mov.l @r0, r1
+ synco
+
+ mov.l CS0_A, r0
+ synco
+ mov.l @r0, r1
+ synco
+
+ /* set DDR-SDRAM bus/endian etc */
+ write32 MIM_U_A, MIM_U_D
+
+ write32 MIM_L_A, MIM_L_D0
+
+ write32 SDR_L_A, SDR_L_A_D0
+
+ write32 STR_L_A, STR_L_A_D0
+
+ /* DDR-SDRAM access control */
+ write32 MIM_L_A, MIM_L_D1
+
+ write32 SCR_L_A, SCR_L_A_D0
+
+ write32 SCR_L_A, SCR_L_A_D1
+
+ write32 EMRS_A, EMRS_D
+
+ write32 MRS1_A, MRS1_D
+
+ write32 MIM_U_A, MIM_U_D
+
+ write32 MIM_L_A, MIM_L_A_D2
+
+ write32 SCR_L_A, SCR_L_A_D2
+
+ write32 SCR_L_A, SCR_L_A_D2
+
+ write32 MRS2_A, MRS2_D
+
+ /* wait 200us */
+ wait_timer REPEAT_R3
+
+ /* GPIO setting */
+ write16 PSEL0_A, PSEL0_D
+
+ write16 PSEL1_A, PSEL1_D
+
+ write16 PSEL2_A, PSEL2_D
+
+ write16 PSEL3_A, PSEL3_D
+
+ write16 PSEL4_A, PSEL4_D
+
+ write8 PADR_A, PADR_D
+
+ write16 PACR_A, PACR_D
+
+ write8 PBDR_A, PBDR_D
+
+ write16 PBCR_A, PBCR_D
+
+ write8 PCDR_A, PCDR_D
+
+ write16 PCCR_A, PCCR_D
+
+ write8 PDDR_A, PDDR_D
+
+ write16 PDCR_A, PDCR_D
+
+ write16 PECR_A, PECR_D
+
+ write16 PFCR_A, PFCR_D
+
+ write16 PGCR_A, PGCR_D
+
+ write16 PHCR_A, PHCR_D
+
+ write16 PICR_A, PICR_D
+
+ write8 PJDR_A, PJDR_D
+
+ write16 PJCR_A, PJCR_D
+
+ /* wait 50us */
+ wait_timer REPEAT_R3
+
+ write8 PKDR_A, PKDR_D
+
+ write16 PKCR_A, PKCR_D
+
+ write16 PLCR_A, PLCR_D
+
+ write16 PMCR_A, PMCR_D
+
+ write16 PNCR_A, PNCR_D
+
+ write16 POCR_A, POCR_D
+
+
+ /* ICR0 ,ICR1 */
+ write32 ICR0_A, ICR0_D
+
+ write32 ICR1_A, ICR1_D
+
+ /* USB Host */
+ write32 USB_USBHSC_A, USB_USBHSC_D
+
+ write32 CCR_A, CCR_CACHE_D_2
+
+ rts
+ nop
+
+ .align 2
+
+/* GPIO Crontrol Register */
+PACR_A: .long 0xFFEF0000
+PBCR_A: .long 0xFFEF0002
+PCCR_A: .long 0xFFEF0004
+PDCR_A: .long 0xFFEF0006
+PECR_A: .long 0xFFEF0008
+PFCR_A: .long 0xFFEF000A
+PGCR_A: .long 0xFFEF000C
+PHCR_A: .long 0xFFEF000E
+PICR_A: .long 0xFFEF0010
+PJCR_A: .long 0xFFEF0012
+PKCR_A: .long 0xFFEF0014
+PLCR_A: .long 0xFFEF0016
+PMCR_A: .long 0xFFEF0018
+PNCR_A: .long 0xFFEF001A
+POCR_A: .long 0xFFEF001C
+
+/* GPIO Data Register */
+PADR_A: .long 0xFFEF0020
+PBDR_A: .long 0xFFEF0022
+PCDR_A: .long 0xFFEF0024
+PDDR_A: .long 0xFFEF0026
+PJDR_A: .long 0xFFEF0032
+PKDR_A: .long 0xFFEF0034
+
+/* GPIO Set data */
+PADR_D: .long 0x00000000
+PACR_D: .long 0x00001400
+PBDR_D: .long 0x00000000
+PBCR_D: .long 0x0000555A
+PCDR_D: .long 0x00000000
+PCCR_D: .long 0x00005555
+PDDR_D: .long 0x00000000
+PDCR_D: .long 0x00000155
+PECR_D: .long 0x00000000
+PFCR_D: .long 0x00000000
+PGCR_D: .long 0x00000000
+PHCR_D: .long 0x00000000
+PICR_D: .long 0x00000800
+PJDR_D: .long 0x00000006
+PJCR_D: .long 0x00005A57
+PKDR_D: .long 0x00000000
+PKCR_D: .long 0x0000FFF9
+PLCR_D: .long 0x0000C330
+PMCR_D: .long 0x0000FFFF
+PNCR_D: .long 0x00000242
+POCR_D: .long 0x00000000
+
+/* Pin Select */
+PSEL0_A: .long 0xFFEF0070
+PSEL1_A: .long 0xFFEF0072
+PSEL2_A: .long 0xFFEF0074
+PSEL3_A: .long 0xFFEF0076
+PSEL4_A: .long 0xFFEF0078
+PSEL0_D: .long 0x0001
+PSEL1_D: .long 0x2400
+PSEL2_D: .long 0x0000
+PSEL3_D: .long 0x2421
+PSEL4_D: .long 0x0000
+
+MMSEL_A: .long 0xFE600020
+BCR_A: .long 0xFF801000
+CS0BCR_A: .long 0xFF802000
+CS0WCR_A: .long 0xFF802008
+ICR0_A: .long 0xFFD00000
+ICR1_A: .long 0xFFD0001C
+
+MMSEL_D: .long 0xA5A50000
+BCR_D: .long 0x05000000
+CS0BCR_D: .long 0x232306F0
+CS0WCR_D: .long 0x00011104
+ICR0_D: .long 0x80C00000
+ICR1_D: .long 0x00020000
+
+/* RWBT Address */
+WDTST_A: .long 0xFFCC0000
+WDTCSR_A: .long 0xFFCC0004
+WDTBST_A: .long 0xFFCC0008
+/* RWBT Data */
+WDTST_D: .long 0x5A000FFF
+WDTCSR_D: .long 0xA5000000
+WDTBST_D: .long 0x55000000
+
+/* Cache Address */
+CCR_A: .long 0xFF00001C
+MMUCR_A: .long 0xFF000010
+RAMCR_A: .long 0xFF000074
+
+/* Cache Data */
+CCR_CACHE_ICI_D:.long 0x00000800
+CCR_CACHE_D_2: .long 0x00000103
+MMU_CONTROL_TI_D:.long 0x00000004
+RAMCR_D: .long 0x00000200
+
+/* Low power mode control Address */
+MSTPCR0_A: .long 0xFFC80030
+MSTPCR1_A: .long 0xFFC80038
+/* Low power mode control Data */
+MSTPCR0_D: .long 0x00000000
+MSTPCR1_D: .long 0x00000000
+
+REPEAT0_R3: .long 0x00002000
+REPEAT_R3: .long 0x00000200
+CS0_A: .long 0xA8000000
+
+MIM_U_A: .long 0xFE800008
+MIM_L_A: .long 0xFE80000C
+SCR_U_A: .long 0xFE800010
+SCR_L_A: .long 0xFE800014
+STR_U_A: .long 0xFE800018
+STR_L_A: .long 0xFE80001C
+SDR_U_A: .long 0xFE800030
+SDR_L_A: .long 0xFE800034
+EMRS_A: .long 0xFE902000
+MRS1_A: .long 0xFE900B08
+MRS2_A: .long 0xFE900308
+
+MIM_U_D: .long 0x00000000
+MIM_L_D0: .long 0x04100008
+MIM_L_D1: .long 0x02EE0009
+MIM_L_D2: .long 0x02EE0209
+
+SDR_L_A_D0: .long 0x00000300
+STR_L_A_D0: .long 0x00010040
+MIM_L_A_D1: .long 0x04100009
+SCR_L_A_D0: .long 0x00000003
+SCR_L_A_D1: .long 0x00000002
+MIM_L_A_D2: .long 0x04100209
+SCR_L_A_D2: .long 0x00000004
+
+SCR_L_NORMAL: .long 0x00000000
+SCR_L_NOP: .long 0x00000001
+SCR_L_PALL: .long 0x00000002
+SCR_L_CKE_EN: .long 0x00000003
+SCR_L_CBR: .long 0x00000004
+
+STR_L_D: .long 0x000F3980
+SDR_L_D: .long 0x00000400
+EMRS_D: .long 0x00000000
+MRS1_D: .long 0x00000000
+MRS2_D: .long 0x00000000
+
+/* USB */
+USB_USBHSC_A: .long 0xFFEC80F0
+USB_USBHSC_D: .long 0x00000000
+++ /dev/null
-/*
- * Copyright (C) 2007
- * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * Copyright (C) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * Copyright (C) 2008
- * Mark Jonas <mark.jonas@de.bosch.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x8C000000.
- U-Boot resides in the last 256 kB of the 64 MB.
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x8C000000 + (64*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh3/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x0C000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x8C000000 + (64*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh3/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x0C000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x8C000000 + (64*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss (NOLOAD) :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x0C000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x8C000000 + (64*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss (NOLOAD) :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x0C000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x8C000000 + (64*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x88000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x88000000 + (128*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007,2008
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x0C000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x0C000000 + (64*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007,2008
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x0C000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x08000000 + (128*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyright (C) 2008 Nobuhiro Iwamatsu
- * Copyright (C) 2008 Renesas Solutions Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- * Base address of internal SDRAM is 0x0C000000.
- *
- * NOTE: This address must match with the definition of
- *TEXT_BASE in config.mk (in this directory).
- */
-
- . = 0x0C000000 + (8*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh2/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007,2008
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- Base address of internal SDRAM is 0x0C000000.
- Although size of SDRAM can be either 16 or 32 MBytes,
- we assume 16 MBytes (ie ignore upper half if the full
- 32 MBytes is present).
-
- NOTE: This address must match with the definition of
- TEXT_BASE in config.mk (in this directory).
-
- */
- . = 0x8C000000 + (64*1024*1024) - (256*1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
COBJS := sh7785lcr.o selfcheck.o rtl8169_mac.o
SOBJS := lowlevel_init.o
WAIT_200US: .long 33333
/*------- GPIO -------*/
-#define GPIO_BASE 0xffe70000
-PACR_A: .long GPIO_BASE + 0x00
-PBCR_A: .long GPIO_BASE + 0x02
-PCCR_A: .long GPIO_BASE + 0x04
-PDCR_A: .long GPIO_BASE + 0x06
-PECR_A: .long GPIO_BASE + 0x08
-PFCR_A: .long GPIO_BASE + 0x0a
-PGCR_A: .long GPIO_BASE + 0x0c
-PHCR_A: .long GPIO_BASE + 0x0e
-PJCR_A: .long GPIO_BASE + 0x10
-PKCR_A: .long GPIO_BASE + 0x12
-PLCR_A: .long GPIO_BASE + 0x14
-PMCR_A: .long GPIO_BASE + 0x16
-PNCR_A: .long GPIO_BASE + 0x18
-PPCR_A: .long GPIO_BASE + 0x1a
-PQCR_A: .long GPIO_BASE + 0x1c
-PRCR_A: .long GPIO_BASE + 0x1e
-PEPUPR_A: .long GPIO_BASE + 0x48
-PHPUPR_A: .long GPIO_BASE + 0x4e
-PJPUPR_A: .long GPIO_BASE + 0x50
-PKPUPR_A: .long GPIO_BASE + 0x52
-PLPUPR_A: .long GPIO_BASE + 0x54
-PMPUPR_A: .long GPIO_BASE + 0x56
-PNPUPR_A: .long GPIO_BASE + 0x58
-PPUPR1_A: .long GPIO_BASE + 0x60
-PPUPR2_A: .long GPIO_BASE + 0x62
-P1MSELR_A: .long GPIO_BASE + 0x80
-P2MSELR_A: .long GPIO_BASE + 0x82
-
PACR_D: .long 0x0000
PBCR_D: .long 0x0000
PCCR_D: .long 0x0000
P1MSELR_D: .long 0x3780
P2MSELR_D: .long 0x0000
+#define GPIO_BASE 0xffe70000
+PACR_A: .long GPIO_BASE + 0x00
+PBCR_A: .long GPIO_BASE + 0x02
+PCCR_A: .long GPIO_BASE + 0x04
+PDCR_A: .long GPIO_BASE + 0x06
+PECR_A: .long GPIO_BASE + 0x08
+PFCR_A: .long GPIO_BASE + 0x0a
+PGCR_A: .long GPIO_BASE + 0x0c
+PHCR_A: .long GPIO_BASE + 0x0e
+PJCR_A: .long GPIO_BASE + 0x10
+PKCR_A: .long GPIO_BASE + 0x12
+PLCR_A: .long GPIO_BASE + 0x14
+PMCR_A: .long GPIO_BASE + 0x16
+PNCR_A: .long GPIO_BASE + 0x18
+PPCR_A: .long GPIO_BASE + 0x1a
+PQCR_A: .long GPIO_BASE + 0x1c
+PRCR_A: .long GPIO_BASE + 0x1e
+PEPUPR_A: .long GPIO_BASE + 0x48
+PHPUPR_A: .long GPIO_BASE + 0x4e
+PJPUPR_A: .long GPIO_BASE + 0x50
+PKPUPR_A: .long GPIO_BASE + 0x52
+PLPUPR_A: .long GPIO_BASE + 0x54
+PMPUPR_A: .long GPIO_BASE + 0x56
+PNPUPR_A: .long GPIO_BASE + 0x58
+PPUPR1_A: .long GPIO_BASE + 0x60
+PPUPR2_A: .long GPIO_BASE + 0x62
+P1MSELR_A: .long GPIO_BASE + 0x80
+P2MSELR_A: .long GPIO_BASE + 0x82
+
/*------- LBSC -------*/
PASCR_A: .long 0xff000070
PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- * Copyrigth (c) 2008-2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- . = 0x88000000 + (128 * 1024 * 1024) - (512 * 1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- * Copyrigth (c) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- . = 0x08000000 + (128 * 1024 * 1024) - (512 * 1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(.rodata)
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
+++ /dev/null
-/*
- * Copyrigth (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- * Copyrigth (c) 2008-2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- . = 0x88000000 + (128 * 1024 * 1024) - (512 * 1024);
-
- PROVIDE (reloc_dst = .);
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- cpu/sh4/start.o (.text)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(.rodata)
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
- PROVIDE (__u_boot_cmd_start = .);
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- . = ALIGN(4);
- }
- PROVIDE (__u_boot_cmd_end = .);
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (_end = .);
-}
return err ? err : count_save - size;
}
-static int ubi_dev_scan(struct mtd_info *info, char *ubidev)
+static int ubi_dev_scan(struct mtd_info *info, char *ubidev,
+ const char *vid_header_offset)
{
struct mtd_device *dev;
struct part_info *part;
struct mtd_partition mtd_part;
+ char ubi_mtd_param_buffer[80];
u8 pnum;
int err;
mtd_part.offset = part->offset;
add_mtd_partitions(info, &mtd_part, 1);
- err = ubi_mtd_param_parse(buffer, NULL);
+ strcpy(ubi_mtd_param_buffer, buffer);
+ if (vid_header_offset)
+ sprintf(ubi_mtd_param_buffer, "mtd=%d,%s", pnum,
+ vid_header_offset);
+ err = ubi_mtd_param_parse(ubi_mtd_param_buffer, NULL);
if (err) {
del_mtd_partitions(info);
return err;
char mtd_dev[16];
struct mtd_device *dev;
struct part_info *part;
+ const char *vid_header_offset = NULL;
u8 pnum;
/* Print current partition */
ubi_dev.selected = 1;
+ if (argc > 3)
+ vid_header_offset = argv[3];
strcpy(ubi_dev.part_name, argv[2]);
- err = ubi_dev_scan(ubi_dev.mtd_info, ubi_dev.part_name);
+ err = ubi_dev_scan(ubi_dev.mtd_info, ubi_dev.part_name,
+ vid_header_offset);
if (err) {
printf("UBI init error %d\n", err);
ubi_dev.selected = 0;
U_BOOT_CMD(ubi, 6, 1, do_ubi,
"ubi commands",
- "part [part]"
- " - Show or set current partition\n"
+ "part [part] [offset]\n"
+ " - Show or set current partition (with optional VID"
+ " header offset)\n"
"ubi info [l[ayout]]"
" - Display volume and ubi layout information\n"
"ubi create[vol] volume [size] [type]"
char *vol_name;
int ret;
+ if (argc != 2) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
vol_name = argv[1];
debug("Using volume %s\n", vol_name);
int do_ubifs_load(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
char *filename;
+ char *endp;
int ret;
u32 addr;
u32 size = 0;
}
if (argc < 3) {
- printf("Usage:\n%s\n", cmdtp->usage);
+ cmd_usage(cmdtp);
return -1;
}
- addr = simple_strtoul(argv[1], NULL, 16);
+ addr = simple_strtoul(argv[1], &endp, 16);
+ if (endp == argv[1]) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
filename = argv[2];
- if (argc == 4)
- size = simple_strtoul(argv[3], NULL, 16);
+ if (argc == 4) {
+ size = simple_strtoul(argv[3], &endp, 16);
+ if (endp == argv[3]) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+ }
debug("Loading file '%s' to address 0x%08x (size %d)\n", filename, addr, size);
ret = ubifs_load(filename, addr, size);
U_BOOT_CMD(
ubifsmount, 2, 0, do_ubifs_mount,
"mount UBIFS volume",
- ""
+ "<volume-name>\n"
+ " - mount 'volume-name' volume"
);
U_BOOT_CMD(ubifsls, 2, 0, do_ubifs_ls,
struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR;
/* Configure interface. */
- setbits_be32((void *)ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);
+ setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);
/* Wait for clock to stabilize */
do {
- temp = in_be32((void *)ehci->control);
+ temp = in_be32(&ehci->control);
udelay(1000);
} while (!(temp & PHY_CLK_VALID));
#endif
*/
int __pci_pre_init(struct pci_controller *hose)
{
+#if defined (CONFIG_405EP)
+ /*
+ * Enable the internal PCI arbiter by default.
+ *
+ * On 405EP CPUs the internal arbiter can be controlled
+ * by the I2C strapping EEPROM. If you want to do so
+ * or if you want to disable the arbiter pci_pre_init()
+ * must be reimplemented without enabling the arbiter.
+ * The arbiter is enabled in this place because of
+ * compatibility reasons.
+ */
+ mtdcr(cpc0_pci, mfdcr(cpc0_pci) | CPC0_PCI_ARBIT_EN);
+#endif /* CONFIG_405EP */
+
return 1;
}
int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init")));
}
#endif
-#if defined(CONFIG_405EP) /* on ppc405ep vendor id is not set */
- pci_write_config_word(PCIDEVID_405GP, PCI_VENDOR_ID, 0x1014); /* IBM */
+#if defined(CONFIG_405EP)
+ /*
+ * on ppc405ep vendor/device id is not set
+ * The user manual says 0x1014 (IBM) / 0x0156 (405GP!)
+ * are the correct values.
+ */
+ pci_write_config_word(PCIDEVID_405GP, PCI_VENDOR_ID, PCI_VENDOR_ID_IBM);
+ pci_write_config_word(PCIDEVID_405GP,
+ PCI_DEVICE_ID, PCI_DEVICE_ID_IBM_405GP);
#endif
/*
* Set EMAC noise filter bits
*/
mtdcr(cpc0_epctl, CPC0_EPRCSR_E0NFE | CPC0_EPRCSR_E1NFE);
-
- /*
- * Enable the internal PCI arbiter
- */
- mtdcr(cpc0_pci, mfdcr(cpc0_pci) | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
#endif /* CONFIG_405EP */
#if defined(CONFIG_SYS_4xx_GPIO_TABLE)
--- /dev/null
+/*
+ * Copyright (C) 2008 Nobuhiro Iwamatsu
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * entry and reloct_dst will be provided via ldflags
+ */
+ . = .;
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh2/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
--- /dev/null
+/*
+ * Copyright (C) 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * Copyright (C) 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * Copyright (C) 2008
+ * Mark Jonas <mark.jonas@de.bosch.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * entry and reloct_dst will be provided via ldflags
+ */
+ . = .;
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh3/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+ /* _reloc_dst_end = .; */
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
--- /dev/null
+/*
+ * Copyright (C) 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * Copyright (C) 2008-2009
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * entry and reloct_dst will be provided via ldflags
+ */
+ . = .;
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh4/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+ /* _reloc_dst_end = .; */
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss (NOLOAD) :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o
COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
+COBJS-$(CONFIG_USB_EHCI_KIRKWOOD) += ehci-kirkwood.o
COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
struct usb_ehci *ehci;
ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR;
- hccr = (struct ehci_hccr *)((uint32_t)ehci->caplength);
+ hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
hcor = (struct ehci_hcor *)((uint32_t) hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
/* Set to Host mode */
- setbits_le32((void *)ehci->usbmode, CM_HOST);
+ setbits_le32(&ehci->usbmode, CM_HOST);
- out_be32((void *)ehci->snoop1, SNOOP_SIZE_2GB);
- out_be32((void *)ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
+ out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
+ out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
/* Init phy */
if (!strcmp(getenv("usb_phy_type"), "utmi"))
out_le32(&(hcor->or_portsc[0]), PORT_PTS_ULPI);
/* Enable interface. */
- setbits_be32((void *)ehci->control, USB_EN);
+ setbits_be32(&ehci->control, USB_EN);
- out_be32((void *)ehci->prictrl, 0x0000000c);
- out_be32((void *)ehci->age_cnt_limit, 0x00000040);
- out_be32((void *)ehci->sictrl, 0x00000001);
+ out_be32(&ehci->prictrl, 0x0000000c);
+ out_be32(&ehci->age_cnt_limit, 0x00000040);
+ out_be32(&ehci->sictrl, 0x00000001);
- in_le32((void *)ehci->usbmode);
+ in_le32(&ehci->usbmode);
return 0;
}
goto unknown;
}
/* unblock posted writes */
- ehci_readl(&hcor->or_usbcmd);
+ (void) ehci_readl(&hcor->or_usbcmd);
break;
case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
reg = ehci_readl(status_reg);
}
ehci_writel(status_reg, reg);
/* unblock posted write */
- ehci_readl(&hcor->or_usbcmd);
+ (void) ehci_readl(&hcor->or_usbcmd);
break;
default:
debug("Unknown request\n");
--- /dev/null
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <usb.h>
+#include "ehci.h"
+#include "ehci-core.h"
+#include <asm/arch/kirkwood.h>
+
+#define rdl(off) readl(KW_USB20_BASE + (off))
+#define wrl(off, val) writel((val), KW_USB20_BASE + (off))
+
+#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
+#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
+#define USB_TARGET_DRAM 0x0
+
+/*
+ * USB 2.0 Bridge Address Decoding registers setup
+ */
+static void usb_brg_adrdec_setup(void)
+{
+ int i;
+ u32 size, attrib;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+
+ /* Enable DRAM bank */
+ switch (i) {
+ case 0:
+ attrib = KWCPU_ATTR_DRAM_CS0;
+ break;
+ case 1:
+ attrib = KWCPU_ATTR_DRAM_CS1;
+ break;
+ case 2:
+ attrib = KWCPU_ATTR_DRAM_CS2;
+ break;
+ case 3:
+ attrib = KWCPU_ATTR_DRAM_CS3;
+ break;
+ default:
+ /* invalide bank, disable access */
+ attrib = 0;
+ break;
+ }
+
+ size = kw_sdram_bs(i);
+ if ((size) && (attrib))
+ wrl(USB_WINDOW_CTRL(i),
+ KWCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM,
+ attrib, KWCPU_WIN_ENABLE));
+ else
+ wrl(USB_WINDOW_CTRL(i), KWCPU_WIN_DISABLE);
+
+ wrl(USB_WINDOW_BASE(i), kw_sdram_bar(i));
+ }
+}
+
+/*
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ */
+int ehci_hcd_init(void)
+{
+ usb_brg_adrdec_setup();
+
+ hccr = (struct ehci_hccr *)(KW_USB20_BASE + 0x100);
+ hcor = (struct ehci_hcor *)((uint32_t) hccr
+ + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+
+ debug("Kirkwood-ehci: init hccr %x and hcor %x hc_length %d\n",
+ (uint32_t)hccr, (uint32_t)hcor,
+ (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+
+ return 0;
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the the EHCI host controller.
+ */
+int ehci_hcd_stop(void)
+{
+ return 0;
+}
+
extern void write_fifo(u8 ep, u32 length, void *fifo_data);
extern void read_fifo(u8 ep, u32 length, void *fifo_data);
-/* extern functions */
-extern inline void musb_writew(u32 offset, u16 value);
-extern inline void musb_writeb(u32 offset, u8 value);
-extern inline u16 musb_readw(u32 offset);
-extern inline u8 musb_readb(u32 offset);
-
#endif /* __MUSB_HDRC_DEFS_H__ */
{
u16 csr;
int result = 1;
+ int timeout = CONFIG_MUSB_TIMEOUT;
while (result > 0) {
csr = readw(&musbr->txcsr);
}
break;
}
+
+ /* Check the timeout */
+ if (--timeout)
+ udelay(1);
+ else {
+ dev->status = USB_ST_CRC_ERR;
+ result = -1;
+ break;
+ }
}
+
return result;
}
static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)
{
u16 csr;
+ int timeout = CONFIG_MUSB_TIMEOUT;
do {
if (check_stall(ep, 1)) {
dev->status = USB_ST_CRC_ERR;
return 0;
}
+
+ /* Check the timeout */
+ if (--timeout)
+ udelay(1);
+ else {
+ dev->status = USB_ST_CRC_ERR;
+ return -1;
+ }
+
} while (csr & MUSB_TXCSR_TXPKTRDY);
return 1;
}
static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep)
{
u16 csr;
+ int timeout = CONFIG_MUSB_TIMEOUT;
do {
if (check_stall(ep, 0)) {
dev->status = USB_ST_CRC_ERR;
return 0;
}
+
+ /* Check the timeout */
+ if (--timeout)
+ udelay(1);
+ else {
+ dev->status = USB_ST_CRC_ERR;
+ return -1;
+ }
+
} while (!(csr & MUSB_RXCSR_RXPKTRDY));
return 1;
}
extern unsigned char new[];
#endif
+#ifndef CONFIG_MUSB_TIMEOUT
+# define CONFIG_MUSB_TIMEOUT 100000
+#endif
+
/* This defines the endpoint number used for control transfers */
#define MUSB_CONTROL_EP 0
--- /dev/null
+/*
+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_SH_CLK_H__
+#define __ASM_SH_CLK_H__
+
+static inline unsigned long get_peripheral_clk_rate(void)
+{
+ return CONFIG_SYS_CLK_FREQ;
+}
+
+static inline unsigned long get_tmu0_clk_rate(void)
+{
+ return CONFIG_SYS_CLK_FREQ;
+}
+
+#endif /* __ASM_SH_CLK_H__ */
.macro write16, addr, data
mov.l \addr ,r1
- mov.l \data ,r0
+ mov.w \data ,r0
mov.w r0, @r1
.endm
void pciinfo (int, int);
#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
- int pci_pre_init (struct pci_controller * );
+ int pci_pre_init (struct pci_controller *);
+ int is_pci_host (struct pci_controller *);
#endif
#if defined(CONFIG_PCI) && (defined(CONFIG_440) || defined(CONFIG_405EX))
# if defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init (struct pci_controller *);
# endif
- int is_pci_host (struct pci_controller *);
#if defined(CONFIG_440SPE) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
defined(CONFIG_405EX)
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ 1000
#endif /* __MIGO_R_H */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ 1000
#endif /* __AP325RXA_H */
#endif
#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_OFFSET 0x40000
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x40000
-#define ENV_IS_EMBEDDED_CUSTOM
/*
* SDRAM settings & memory map
* Serial Flash Infomation
*/
#define CONFIG_BFIN_SPI
-/* For the M25P64 SCK Should be Kept < 20Mhz */
-#define CONFIG_ENV_SPI_MAX_HZ 20000000
-#define CONFIG_SF_DEFAULT_SPEED 20000000
+/* For the M25P64 SCK Should be Kept < 15Mhz */
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_SF_DEFAULT_SPEED 15000000
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
+/* The next 2 lines are for use with DEV-BF5xx */
#define CONFIG_DRIVER_SMC91111 1
#define CONFIG_SMC91111_BASE 0x28000300
+/* The next 3 lines are for use with EXT-BF5xx-USB-ETH2 */
+/* #define CONFIG_DRIVER_SMC911X 1 */
+/* #define CONFIG_DRIVER_SMC911X_BASE 0x24080000 // AMS1 */
+/* #define CONFIG_DRIVER_SMC911X_32_BIT 1 */
#define CONFIG_HOSTNAME cm-bf561
/* Uncomment next line to use fixed MAC address */
/* #define CONFIG_ETHADDR 02:80:ad:20:31:cf */
--- /dev/null
+/*
+ * Configuation settings for the ESPT-GIGA board
+ *
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ESPT_H
+#define __ESPT_H
+
+#define CONFIG_SH 1
+#define CONFIG_SH4 1
+#define CONFIG_CPU_SH7763 1
+#define CONFIG_ESPT 1
+#define __LITTLE_ENDIAN 1
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SAVEENV
+
+#define CONFIG_BOOTDELAY -1
+#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
+#define CONFIG_ENV_OVERWRITE 1
+
+#define CONFIG_VERSION_VARIABLE
+#undef CONFIG_SHOW_BOOT_PROGRESS
+
+/* SCIF */
+#define CONFIG_SCIF_CONSOLE 1
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_CONS_SCIF0 1
+
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
+#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
+#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
+#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments
+ passed to kernel */
+#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
+ settings for this board */
+
+/* SDRAM */
+#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
+#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
+#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
+
+/* Flash(NOR) S29JL064H */
+#define CONFIG_SYS_FLASH_BASE (0xA0000000)
+#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
+#define CONFIG_SYS_MAX_FLASH_BANKS (1)
+#define CONFIG_SYS_MAX_FLASH_SECT (150)
+
+/* U-boot setting */
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
+#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
+/* Size of DRAM reserved for malloc() use */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE (256)
+#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#undef CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+/* Timeout for Flash erase operations (in ms) */
+#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
+/* Timeout for Flash write operations (in ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
+/* Timeout for Flash set sector lock bit operations (in ms) */
+#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
+/* Timeout for Flash clear lock bit operations (in ms) */
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
+/* Use hardware flash sectors protection instead of U-Boot software protection */
+#undef CONFIG_SYS_FLASH_PROTECTION
+#undef CONFIG_SYS_DIRECT_FLASH_TFTP
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE (128 * 1024)
+#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
+/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
+#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
+
+/* Clock */
+#define CONFIG_SYS_CLK_FREQ 66666666
+#define CONFIG_SYS_TMU_CLK_DIV 4
+#define CONFIG_SYS_HZ 1000
+
+/* Ether */
+#define CONFIG_NET_MULTI 1
+#define CONFIG_SH_ETHER 1
+#define CONFIG_SH_ETHER_USE_PORT (1)
+#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
+
+#endif /* __SH7763RDP_H */
/* Clocks */
#define CONFIG_SYS_CLK_FREQ 24000000
-#define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ 1000
/* UART */
#define CONFIG_SCIF_CONSOLE 1
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ 1000
/* PCMCIA */
#define CONFIG_IDE_PCMCIA 1
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ 1000
#endif /* __MS7722SE_H */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define TMU_CLK_DIVIDER 4
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV 4
+#define CONFIG_SYS_HZ 1000
#endif /* __MS7750SE_H */
* SuperH Clock setting
*/
#define CONFIG_SYS_CLK_FREQ 60000000
-#define TMU_CLK_DIVIDER 4
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV 4
+#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
/*
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
-#define TMU_CLK_DIVIDER 4
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV 4
+#define CONFIG_SYS_HZ 1000
/* PCI Controller */
#if defined(CONFIG_CMD_PCI)
#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
+#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
#endif /* CONFIG_CMD_PCI */
#if defined(CONFIG_CMD_NET)
/* Clock */
#define CONFIG_SYS_CLK_FREQ 66666666
-#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ 1000
/* Ether */
#define CONFIG_NET_MULTI 1
/* Board Clock */
/* The SCIF used external clock. system clock only used timer. */
#define CONFIG_SYS_CLK_FREQ 50000000
-#define TMU_CLK_DIVIDER 4
-#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV 4
+#define CONFIG_SYS_HZ 1000
#endif /* __SH7785LCR_H */
#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR
#elif defined(CONFIG_MPC85xx)
#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR
COBJS-y += boot.o
COBJS-y += cache.o
COBJS-y += clocks.o
+COBJS-$(CONFIG_CMD_CACHE_DUMP) += cmd_cache_dump.o
COBJS-y += muldi3.o
COBJS-$(CONFIG_POST) += post.o tests.o
COBJS-y += string.o
--- /dev/null
+/*
+ * U-boot - cmd_cache_dump.c
+ *
+ * Copyright (c) 2007-2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <command.h>
+
+#include <asm/blackfin.h>
+#include <asm/mach-common/bits/mpu.h>
+
+static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, size_t end)
+{
+ if (start >= start_limit && start <= end_limit && \
+ end <= end_limit && end >= start_limit && \
+ start <= end)
+ return 0;
+
+ printf("%s limit violation: %zu <= (user:%zu) <= (user:%zu) <= %zu\n",
+ type, start_limit, start, end, end_limit);
+ return 1;
+}
+
+int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int cache_status = icache_status();
+
+ if (cache_status)
+ icache_disable();
+
+ uint32_t cmd_base, tag, cache_upper, cache_lower;
+
+ size_t way, way_start = 0, way_end = 3;
+ size_t sbnk, sbnk_start = 0, sbnk_end = 3;
+ size_t set, set_start = 0, set_end = 31;
+ size_t dw;
+
+ if (argc > 1) {
+ way_start = way_end = simple_strtoul(argv[1], NULL, 10);
+ if (argc > 2) {
+ sbnk_start = sbnk_end = simple_strtoul(argv[2], NULL, 10);
+ if (argc > 3)
+ set_start = set_end = simple_strtoul(argv[3], NULL, 10);
+ }
+ }
+
+ if (check_limit("way", 0, 3, way_start, way_end) || \
+ check_limit("subbank", 0, 3, sbnk_start, sbnk_end) || \
+ check_limit("set", 0, 31, set_start, set_end))
+ return 1;
+
+ puts("Way:Subbank:Set: [valid-tag lower upper] {invalid-tag lower upper}...\n");
+
+ for (way = way_start; way <= way_end; ++way) {
+ for (sbnk = sbnk_start; sbnk <= sbnk_end; ++sbnk) {
+ for (set = set_start; set <= set_end; ++set) {
+ printf("%zu:%zu:%2zu: ", way, sbnk, set);
+ for (dw = 0; dw < 4; ++dw) {
+ if (ctrlc())
+ return 1;
+
+ cmd_base = \
+ (way << 26) | \
+ (sbnk << 16) | \
+ (set << 5) | \
+ (dw << 3);
+
+ /* first read the tag */
+ bfin_write_ITEST_COMMAND(cmd_base | 0x0);
+ SSYNC();
+ tag = bfin_read_ITEST_DATA0();
+ printf("%c%08x ", (tag & 0x1 ? ' ' : '{'), tag);
+
+ /* grab the data at this loc */
+ bfin_write_ITEST_COMMAND(cmd_base | 0x4);
+ SSYNC();
+ cache_lower = bfin_read_ITEST_DATA0();
+ cache_upper = bfin_read_ITEST_DATA1();
+ printf("%08x %08x%c ", cache_lower, cache_upper, (tag & 0x1 ? ' ' : '}'));
+ }
+ puts("\n");
+ }
+ }
+ }
+
+ if (cache_status)
+ icache_enable();
+
+ return 0;
+}
+
+U_BOOT_CMD(icache_dump, 4, 0, do_icache_dump,
+ "icache_dump - dump current instruction cache\n",
+ "[way] [subbank] [set]");
+
+int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ u32 way, bank, subbank, set;
+ u32 status, addr;
+ u32 dmem_ctl = bfin_read_DMEM_CONTROL();
+
+ for (bank = 0; bank < 2; ++bank) {
+ if (!(dmem_ctl & (1 << (DMC1_P - bank))))
+ continue;
+
+ for (way = 0; way < 2; ++way)
+ for (subbank = 0; subbank < 4; ++subbank) {
+ printf("%i:%i:%i:\t", bank, way, subbank);
+ for (set = 0; set < 64; ++set) {
+
+ if (ctrlc())
+ return 1;
+
+ /* retrieve a cache tag */
+ bfin_write_DTEST_COMMAND(
+ way << 26 |
+ bank << 23 |
+ subbank << 16 |
+ set << 5
+ );
+ CSYNC();
+ status = bfin_read_DTEST_DATA0();
+
+ /* construct the address using the tag */
+ addr = (status & 0xFFFFC800) | (subbank << 12) | (set << 5);
+
+ /* show it */
+ if (set && !(set % 4))
+ puts("\n\t");
+ printf("%c%08x%c%08x%c ", (status & 0x1 ? '[' : '{'), status, (status & 0x2 ? 'd' : ' '), addr, (status & 0x1 ? ']' : '}'));
+ }
+ puts("\n");
+ }
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD(dcache_dump, 4, 0, do_dcache_dump,
+ "dcache_dump - dump current data cache\n",
+ "[bank] [way] [subbank] [set]");
/*
+ * (C) Copyright 2009
+ * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
* (C) Copyright 2007-2008
* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
*/
#include <common.h>
+#include <div64.h>
#include <asm/processor.h>
+#include <asm/clk.h>
#include <asm/io.h>
#define TMU_MAX_COUNTER (~0UL)
-static int clk_adj = 1;
+
+static ulong timer_freq;
+
+static inline unsigned long long tick_to_time(unsigned long long tick)
+{
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, timer_freq);
+
+ return tick;
+}
+
+static inline unsigned long long usec_to_tick(unsigned long long usec)
+{
+ usec *= timer_freq;
+ do_div(usec, 1000000);
+
+ return usec;
+}
static void tmu_timer_start (unsigned int timer)
{
int timer_init (void)
{
- /* Divide clock by TMU_CLK_DIVIDER */
+ /* Divide clock by CONFIG_SYS_TMU_CLK_DIV */
u16 bit = 0;
- switch (TMU_CLK_DIVIDER) {
+ switch (CONFIG_SYS_TMU_CLK_DIV) {
case 1024:
bit = 4;
break;
break;
case 4:
default:
- bit = 0;
break;
}
writew(readw(TCR0) | bit, TCR0);
- /* Clock adjustment calc */
- clk_adj = (int)(1.0 / ((1.0 / CONFIG_SYS_HZ) * 1000000));
- if (clk_adj < 1)
- clk_adj = 1;
+ /* Calc clock rate */
+ timer_freq = get_tmu0_clk_rate() >> ((bit + 1) * 2);
tmu_timer_stop(0);
tmu_timer_start(0);
return 0 - readl(TCNT0);
}
-static unsigned long get_usec (void)
-{
- return (0 - readl(TCNT0));
-}
-
void udelay (unsigned long usec)
{
- unsigned int start = get_usec();
- unsigned int end = start + (usec * clk_adj);
+ unsigned long long tmp;
+ ulong tmo;
+
+ tmo = usec_to_tick(usec);
+ tmp = get_ticks() + tmo; /* get current timestamp */
- while (get_usec() < end)
- continue;
+ while (get_ticks() < tmp) /* loop till event */
+ /*NOP*/;
}
unsigned long get_timer (unsigned long base)
{
/* return msec */
- return ((get_usec() / clk_adj) / 1000) - base;
+ return tick_to_time(get_ticks()) - base;
}
void set_timer (unsigned long t)
unsigned long get_tbclk (void)
{
- return CONFIG_SYS_HZ;
+ return timer_freq;
}
#
PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__
+PLATFORM_LDFLAGS += -e $(TEXT_BASE) --defsym reloc_dst=$(TEXT_BASE)
+
+LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds
projects / oweals / u-boot.git / commitdiff