The driver implements read/write operations for use with the FAN53555
regulator driver and binds the regulator driver to its node.
+config DM_PMIC_PCA9450
+ bool "Enable Driver Model for PMIC PCA9450"
+ depends on DM_PMIC
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC PCA9450. The driver implements read/write operations.
+
config DM_PMIC_PFUZE100
bool "Enable Driver Model for PMIC PFUZE100"
depends on DM_PMIC
obj-$(CONFIG_DM_PMIC_MC34708) += mc34708.o
obj-$(CONFIG_$(SPL_)DM_PMIC_BD71837) += bd71837.o
obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
+obj-$(CONFIG_$(SPL_)DM_PMIC_PCA9450) += pca9450.o
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
+obj-$(CONFIG_POWER_PCA9450) += pmic_pca9450.o
obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
obj-$(CONFIG_POWER_PFUZE3000) += pmic_pfuze3000.o
obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <errno.h>
+#include <dm.h>
+#include <i2c.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include <power/pca9450.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct pmic_child_info pmic_children_info[] = {
+ /* buck */
+ { .prefix = "b", .driver = PCA9450_REGULATOR_DRIVER},
+ /* ldo */
+ { .prefix = "l", .driver = PCA9450_REGULATOR_DRIVER},
+ { },
+};
+
+static int pca9450_reg_count(struct udevice *dev)
+{
+ return PCA9450_REG_NUM;
+}
+
+static int pca9450_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ if (dm_i2c_write(dev, reg, buff, len)) {
+ pr_err("write error to device: %p register: %#x!", dev, reg);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int pca9450_read(struct udevice *dev, uint reg, uint8_t *buff,
+ int len)
+{
+ if (dm_i2c_read(dev, reg, buff, len)) {
+ pr_err("read error from device: %p register: %#x!", dev, reg);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int pca9450_bind(struct udevice *dev)
+{
+ int children;
+ ofnode regulators_node;
+
+ regulators_node = dev_read_subnode(dev, "regulators");
+ if (!ofnode_valid(regulators_node)) {
+ debug("%s: %s regulators subnode not found!", __func__,
+ dev->name);
+ return -ENXIO;
+ }
+
+ debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
+
+ children = pmic_bind_children(dev, regulators_node,
+ pmic_children_info);
+ if (!children)
+ debug("%s: %s - no child found\n", __func__, dev->name);
+
+ /* Always return success for this device */
+ return 0;
+}
+
+static struct dm_pmic_ops pca9450_ops = {
+ .reg_count = pca9450_reg_count,
+ .read = pca9450_read,
+ .write = pca9450_write,
+};
+
+static const struct udevice_id pca9450_ids[] = {
+ { .compatible = "nxp,pca9450a", .data = 0x35, },
+ { .compatible = "nxp,pca9450b", .data = 0x25, },
+ { }
+};
+
+U_BOOT_DRIVER(pmic_pca9450) = {
+ .name = "pca9450 pmic",
+ .id = UCLASS_PMIC,
+ .of_match = pca9450_ids,
+ .bind = pca9450_bind,
+ .ops = &pca9450_ops,
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <i2c.h>
+#include <power/pmic.h>
+#include <power/pca9450.h>
+
+static const char pca9450_name[] = "PCA9450";
+
+int power_pca9450a_init(unsigned char bus)
+{
+ struct pmic *p = pmic_alloc();
+
+ if (!p) {
+ printf("%s: POWER allocation error!\n", __func__);
+ return -ENOMEM;
+ }
+
+ p->name = pca9450_name;
+ p->interface = PMIC_I2C;
+ p->number_of_regs = PCA9450_REG_NUM;
+ p->hw.i2c.addr = 0x35;
+ p->hw.i2c.tx_num = 1;
+ p->bus = bus;
+
+ return 0;
+}
+
+int power_pca9450b_init(unsigned char bus)
+{
+ struct pmic *p = pmic_alloc();
+
+ if (!p) {
+ printf("%s: POWER allocation error!\n", __func__);
+ return -ENOMEM;
+ }
+
+ p->name = pca9450_name;
+ p->interface = PMIC_I2C;
+ p->number_of_regs = PCA9450_REG_NUM;
+ p->hw.i2c.addr = 0x25;
+ p->hw.i2c.tx_num = 1;
+ p->bus = bus;
+
+ return 0;
+}
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 NXP
+ */
+
+#ifndef PCA9450_H_
+#define PCA9450_H_
+
+#define PCA9450_REGULATOR_DRIVER "pca9450_regulator"
+
+enum {
+ PCA9450_REG_DEV_ID = 0x00,
+ PCA9450_INT1 = 0x01,
+ PCA9450_INT1_MSK = 0x02,
+ PCA9450_STATUS1 = 0x03,
+ PCA9450_STATUS2 = 0x04,
+ PCA9450_PWRON_STAT = 0x05,
+ PCA9450_SW_RST = 0x06,
+ PCA9450_PWR_CTRL = 0x07,
+ PCA9450_RESET_CTRL = 0x08,
+ PCA9450_CONFIG1 = 0x09,
+ PCA9450_CONFIG2 = 0x0A,
+ PCA9450_BUCK123_DVS = 0x0C,
+ PCA9450_BUCK1OUT_LIMIT = 0x0D,
+ PCA9450_BUCK2OUT_LIMIT = 0x0E,
+ PCA9450_BUCK3OUT_LIMIT = 0x0F,
+ PCA9450_BUCK1CTRL = 0x10,
+ PCA9450_BUCK1OUT_DVS0 = 0x11,
+ PCA9450_BUCK1OUT_DVS1 = 0x12,
+ PCA9450_BUCK2CTRL = 0x13,
+ PCA9450_BUCK2OUT_DVS0 = 0x14,
+ PCA9450_BUCK2OUT_DVS1 = 0x15,
+ PCA9450_BUCK3CTRL = 0x16,
+ PCA9450_BUCK3OUT_DVS0 = 0x17,
+ PCA9450_BUCK3OUT_DVS1 = 0x18,
+ PCA9450_BUCK4CTRL = 0x19,
+ PCA9450_BUCK4OUT = 0x1A,
+ PCA9450_BUCK5CTRL = 0x1B,
+ PCA9450_BUCK5OUT = 0x1C,
+ PCA9450_BUCK6CTRL = 0x1D,
+ PCA9450_BUCK6OUT = 0x1E,
+ PCA9450_LDO_AD_CTRL = 0x20,
+ PCA9450_LDO1CTRL = 0x21,
+ PCA9450_LDO2CTRL = 0x22,
+ PCA9450_LDO3CTRL = 0x23,
+ PCA9450_LDO4CTRL = 0x24,
+ PCA9450_LDO5CTRL_L = 0x25,
+ PCA9450_LDO5CTRL_H = 0x26,
+ PCA9450_LOADSW_CTRL = 0x2A,
+ PCA9450_VRFLT1_STS = 0x2B,
+ PCA9450_VRFLT2_STS = 0x2C,
+ PCA9450_VRFLT1_MASK = 0x2D,
+ PCA9450_VRFLT2_MASK = 0x2E,
+ PCA9450_REG_NUM,
+};
+
+int power_pca9450a_init(unsigned char bus);
+int power_pca9450b_init(unsigned char bus);
+
+#endif