--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
+
+&usdhc3 {
+ u-boot,dm-spl;
+};
};
&usdhc3 {
- u-boot,dm-spl;
status = "okay";
};
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-icore-rqs-u-boot.dtsi"
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
+
+&usdhc3 {
+ u-boot,dm-spl;
+};
};
&usdhc3 {
- u-boot,dm-spl;
status = "okay";
};
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-icore-rqs-u-boot.dtsi"
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-icore-u-boot.dtsi"
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-u-boot.dtsi"
+
+&usdhc3 {
+ u-boot,dm-spl;
+};
+
+&usdhc4 {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc4 {
+ u-boot,dm-spl;
+};
};
&usdhc3 {
- u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
&usdhc4 {
- u-boot,dm-spl;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc4>;
pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
};
pinctrl_usdhc3: usdhc3grp {
- u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
};
pinctrl_usdhc4: usdhc4grp {
- u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "imx6qdl-u-boot.dtsi"
+
+&usdhc1 {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1 {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+ u-boot,dm-spl;
+};
};
&usdhc1 {
- u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
pinctrl_usdhc1: usdhc1grp {
- u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070
};
pinctrl_usdhc3: usdhc3grp {
- u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
--- /dev/null
+/*
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/ {
+ soc {
+ u-boot,dm-spl;
+
+ aips-bus@02000000 {
+ u-boot,dm-spl;
+ };
+
+ aips-bus@02100000 {
+ u-boot,dm-spl;
+ };
+ };
+};
+
+&gpio1 {
+ u-boot,dm-spl;
+};
+
+&iomuxc {
+ u-boot,dm-spl;
+};
compatible = "simple-bus";
interrupt-parent = <&gpc>;
ranges;
- u-boot,dm-spl;
dma_apbh: dma-apbh@00110000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
#size-cells = <1>;
reg = <0x02000000 0x100000>;
ranges;
- u-boot,dm-spl;
spba-bus@02000000 {
compatible = "fsl,spba-bus", "simple-bus";
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- u-boot,dm-spl;
};
gpio2: gpio@020a0000 {
iomuxc: iomuxc@020e0000 {
compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
reg = <0x020e0000 0x4000>;
- u-boot,dm-spl;
};
ldb: ldb@020e0008 {
#size-cells = <1>;
reg = <0x02100000 0x100000>;
ranges;
- u-boot,dm-spl;
crypto: caam@2100000 {
compatible = "fsl,sec-v4.0";
F: configs/imx6qdl_icore_rqs_defconfig
F: configs/imx6qdl_icore_mipi_defconfig
F: configs/imx6qdl_icore_nand_defconfig
+F: arch/arm/dts/imx6qdl.dtsi
+F: arch/arm/dts/imx6qdl-u-boot.dtsi
F: arch/arm/dts/imx6qdl-icore.dtsi
+F: arch/arm/dts/imx6qdl-icore-u-boot.dtsi
F: arch/arm/dts/imx6q-icore.dts
+F: arch/arm/dts/imx6q-icore-u-boot.dtsi
F: arch/arm/dts/imx6dl-icore.dts
+F: arch/arm/dts/imx6dl-icore-u-boot.dtsi
F: arch/arm/dts/imx6qdl-icore-rqs.dtsi
+F: arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi
F: arch/arm/dts/imx6q-icore-rqs.dts
+F: arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi
F: arch/arm/dts/imx6dl-icore-rqs.dts
+F: arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi
F: arch/arm/dts/imx6dl-icore-mipi.dts
+F: arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi
F: arch/arm/dts/imx6q-icore-mipi.dts
-F: arch/arm/dts/imx6qdl-icore.dtsi
+F: arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi