--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * PQ3 I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ u-boot,dm-pre-reloc;
+ reg = <0x3000 0x100>;
+ interrupts = <43 2 0 0>;
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * PQ3 I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ u-boot,dm-pre-reloc;
+ reg = <0x3100 0x100>;
+ interrupts = <43 2 0 0>;
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * QorIQ I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c0: i2c@118000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ u-boot,dm-pre-reloc;
+ reg = <0x118000 0x100>;
+ interrupts = <38 2 0 0>;
+};
+
+i2c1: i2c@118100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ u-boot,dm-pre-reloc;
+ reg = <0x118100 0x100>;
+ interrupts = <38 2 0 0>;
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * QorIQ I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c2: i2c@119000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <2>;
+ compatible = "fsl-i2c";
+ u-boot,dm-pre-reloc;
+ reg = <0x119000 0x100>;
+ interrupts = <39 2 0 0>;
+};
+
+i2c3: i2c@119100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <3>;
+ compatible = "fsl-i2c";
+ u-boot,dm-pre-reloc;
+ reg = <0x119100 0x100>;
+ interrupts = <39 2 0 0>;
+};