arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz
authorLey Foon Tan <ley.foon.tan@intel.com>
Wed, 27 Nov 2019 07:55:21 +0000 (15:55 +0800)
committerMarek Vasut <marex@denx.de>
Tue, 7 Jan 2020 13:38:33 +0000 (14:38 +0100)
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz.
Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h

index 3b4bb62ca5b115d5d16c801677c3b81154f4332f..71fbaa76678718c662d45a3e81e4ea152db2bd56 100644 (file)
@@ -13,9 +13,7 @@ const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
 const unsigned int cm_get_intosc_clk_hz(void);
 const unsigned int cm_get_fpga_clk_hz(void);
 
-#define CLKMGR_EOSC1_HZ                25000000
-#define CLKMGR_INTOSC_HZ       460000000
-#define CLKMGR_FPGA_CLK_HZ     50000000
+#define CLKMGR_INTOSC_HZ       400000000
 
 /* Clock configuration accessors */
 const struct cm_config * const cm_get_default_config(void);