imx: mx7ulp: Fix SPLL/APLL clock rate calculation issue

The num/denom is a float value, but in the calculation it is convert
to integer 0, and wrong result.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

diff --git a/arch/arm/cpu/armv7/mx7ulp/scg.c b/arch/arm/cpu/armv7/mx7ulp/scg.c
index ca8252d0d27f16b903c60131dd20f47ef2c223e7..c117af0a0ecd50ea00aab3a977e8a6538fccfeee 100644 (file)
--- a/arch/arm/cpu/armv7/mx7ulp/scg.c
+++ b/arch/arm/cpu/armv7/mx7ulp/scg.c
@@ -504,7 +504,9 @@ u32 decode_pll(enum pll_clocks pll)
                num = readl(&scg1_regs->spllnum);
                denom = readl(&scg1_regs->splldenom);
 
-               return (infreq / pre_div) * (mult + num / denom);
+               infreq = infreq / pre_div;
+
+               return infreq * mult + infreq * num / denom;
 
        case PLL_A7_APLL:
                reg = readl(&scg1_regs->apllcsr);
@@ -531,7 +533,9 @@ u32 decode_pll(enum pll_clocks pll)
                num = readl(&scg1_regs->apllnum);
                denom = readl(&scg1_regs->aplldenom);
 
-               return (infreq / pre_div) * (mult + num / denom);
+               infreq = infreq / pre_div;
+
+               return infreq * mult + infreq * num / denom;
 
        case PLL_USB:
                reg = readl(&scg1_regs->upllcsr);