#define LPC32XX_GPIOS 128
-struct lpc32xx_gpio_platdata {
+struct lpc32xx_gpio_priv {
struct gpio_regs *regs;
/* GPIO FUNCTION: SEE WARNING #2 */
signed char function[LPC32XX_GPIOS];
static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_INPUT;
+ gpio_priv->function[offset] = GPIOF_INPUT;
return 0;
}
static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
{
int port, rank, mask, value;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
static int gpio_set(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
static int gpio_clr(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
int value)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_OUTPUT;
+ gpio_priv->function[offset] = GPIOF_OUTPUT;
return lpc32xx_gpio_set_value(dev, offset, value);
}
static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- return gpio_platdata->function[offset];
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ return gpio_priv->function[offset];
}
static const struct dm_gpio_ops gpio_lpc32xx_ops = {
static int lpc32xx_gpio_probe(struct udevice *dev)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
struct gpio_dev_priv *uc_priv = dev->uclass_priv;
if (dev->of_offset == -1) {
}
/* set base address for GPIO registers */
- gpio_platdata->regs = (struct gpio_regs *)GPIO_BASE;
+ gpio_priv->regs = (struct gpio_regs *)GPIO_BASE;
/* all GPIO functions are unknown until requested */
/* GPIO FUNCTION: SEE WARNING #2 */
- memset(gpio_platdata->function, GPIOF_UNKNOWN,
- sizeof(gpio_platdata->function));
+ memset(gpio_priv->function, GPIOF_UNKNOWN, sizeof(gpio_priv->function));
return 0;
}
.id = UCLASS_GPIO,
.ops = &gpio_lpc32xx_ops,
.probe = lpc32xx_gpio_probe,
- .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_platdata),
+ .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_priv),
};