ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Wed, 10 Jul 2019 11:07:46 +0000 (20:07 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Wed, 10 Jul 2019 13:42:06 +0000 (22:42 +0900)
The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/mach-uniphier/dram_init.c
include/configs/uniphier.h

index 970fa09ef03c0aaa6d76ba01572bb2b590e336a1..13821a928831e6689b9a432262063ec8d4e1df9a 100644 (file)
@@ -33,7 +33,7 @@ static int uniphier_memconf_decode(struct uniphier_dram_map *dram_map,
        val = readl(sg_base + SG_MEMCONF);
 
        /* set up ch0 */
-       dram_map[0].base = CONFIG_SYS_SDRAM_BASE;
+       dram_map[0].base = 0x80000000;
 
        switch (val & SG_MEMCONF_CH0_SZ_MASK) {
        case SG_MEMCONF_CH0_SZ_64M:
@@ -255,6 +255,9 @@ int dram_init(void)
 
                gd->ram_size += dram_map[i].size;
 
+               if (!valid_bank_found)
+                       gd->ram_base = dram_map[i].base;
+
                prev_top = dram_map[i].base + dram_map[i].size;
                valid_bank_found = true;
        }
index 6979165260c6d186668d98023fae610731cb19a2..46d576d54aa18449fcd061a6aa450a20d1fa718e 100644 (file)
 #define CONFIG_SYS_NAND_DATA_BASE                      0x68000000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS                  0
 
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_SDRAM_BASE + 0x01000000)
-
 /*
  * Network Configuration
  */
 
 #define CONFIG_SYS_BOOTMAPSZ                   0x20000000
 
-#define CONFIG_SYS_SDRAM_BASE          0x80000000
-
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_TEXT_BASE)
 
 /* only for SPL */