armv8: ls1012ardb: Add TFABOOT support
authorRajesh Bhagat <rajesh.bhagat@nxp.com>
Mon, 5 Nov 2018 18:02:53 +0000 (18:02 +0000)
committerYork Sun <york.sun@nxp.com>
Thu, 6 Dec 2018 22:37:19 +0000 (14:37 -0800)
TFABOOT support includes:
 - ls1012ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT
 - enable PFE validation for secure boot

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
board/freescale/ls1012ardb/Kconfig
board/freescale/ls1012ardb/MAINTAINERS
board/freescale/ls1012ardb/ls1012ardb.c
configs/ls1012ardb_tfa_SECURE_BOOT_defconfig [new file with mode: 0644]
configs/ls1012ardb_tfa_defconfig [new file with mode: 0644]
include/configs/ls1012a_common.h
include/configs/ls1012ardb.h

index 4cd66bd5488d80c390e91390479e17c6c95b7a12..51efd0fa37e4f10b0f9932fd4bdb0938335f9ec5 100644 (file)
@@ -33,6 +33,10 @@ config SYS_LS_PFE_FW_ADDR
        hex "Flash address of PFE firmware"
        default 0x40a00000
 
+config SYS_LS_PFE_ESBC_ADDR
+       hex "PFE Firmware HDR Addr"
+       default 0x40700000
+
 config DDR_PFE_PHYS_BASEADDR
        hex "PFE DDR physical base address"
        default 0x03800000
index a0a0d8dc2443bfed5cdd90e6274875356f343a6b..bb2a183b347afe06730e61e03785f1634ccdd7aa 100644 (file)
@@ -1,9 +1,11 @@
 LS1012ARDB BOARD
 M:     Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
+M:     Rajesh Bhagat <rajesh.bhagat@nxp.com>
 S:     Maintained
 F:     board/freescale/ls1012ardb/
 F:     include/configs/ls1012ardb.h
 F:     configs/ls1012ardb_qspi_defconfig
+F:     configs/ls1012ardb_tfa_defconfig
 
 M:     Sumit Garg <sumit.garg@nxp.com>
 S:     Maintained
index 888f8500d4b09f82d134e5ae6037bd7f9c37097c..f648a9040b6d5e8d43725eb74d30e7e353a6ec32 100644 (file)
@@ -87,8 +87,19 @@ int checkboard(void)
        return 0;
 }
 
+#ifdef CONFIG_TFABOOT
 int dram_init(void)
 {
+       gd->ram_size = tfa_get_dram_size();
+       if (!gd->ram_size)
+               gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+       return 0;
+}
+#else
+int dram_init(void)
+{
+#ifndef CONFIG_TFABOOT
        static const struct fsl_mmdc_info mparam = {
                0x05180000,     /* mdctl */
                0x00030035,     /* mdpdc */
@@ -106,6 +117,7 @@ int dram_init(void)
        };
 
        mmdc_init(&mparam);
+#endif
 
        gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
@@ -115,6 +127,7 @@ int dram_init(void)
 
        return 0;
 }
+#endif
 
 
 int board_early_init_f(void)
@@ -132,7 +145,8 @@ int board_init(void)
         * Set CCI-400 control override register to enable barrier
         * transaction
         */
-       out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
+       if (current_el() == 3)
+               out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
        erratum_a010315();
diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
new file mode 100644 (file)
index 0000000..1cb811f
--- /dev/null
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1012ARDB=y
+CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_TFABOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+# CONFIG_USE_BOOTCOMMAND is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SATA_CEVA=y
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_DM_SCSI=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_RSA_SOFTWARE_EXP=y
diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig
new file mode 100644 (file)
index 0000000..557bf6c
--- /dev/null
@@ -0,0 +1,57 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1012ARDB=y
+CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_TFABOOT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SATA_CEVA=y
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_FSL_PFE=y
+CONFIG_DM_ETH=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_DM_SCSI=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
index 787adbc3823fdee14928ccf1ed6d7a0abb657939..324dba2b7e27eb6717b457c3535872639c6a4c61 100644 (file)
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SYS_TEXT_BASE
+#else
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
+#endif
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
 
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000
@@ -34,7 +38,7 @@
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 128 * 1024)
 
 /*SPI device */
-#ifdef CONFIG_QSPI_BOOT
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR                0x400d0000
 #define CONFIG_ENV_SPI_BUS             0
 #define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_ENV_SIZE                        0x40000          /* 256KB */
+#ifdef CONFIG_TFABOOT
+#define CONFIG_ENV_OFFSET              0x500000        /* 5MB */
+#else
 #define CONFIG_ENV_OFFSET              0x300000        /* 3MB */
+#endif
 #define CONFIG_ENV_SECT_SIZE           0x40000
 #endif
 
        "kernel_size=0x2800000\0"               \
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#define QSPI_NOR_BOOTCOMMAND   "pfe stop; sf probe 0:0; sf read $kernel_load "\
+                               "$kernel_start $kernel_size && "\
+                               "bootm $kernel_load"
+#else
 #define CONFIG_BOOTCOMMAND     "pfe stop; sf probe 0:0; sf read $kernel_load "\
                                "$kernel_start $kernel_size && "\
                                "bootm $kernel_load"
+#endif
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */
index 17554ea955d0a8cbccc3de1efdd80dc3168e5ad6..f149a604cfcc3eb76793339d21ebf274fd38ba48 100644 (file)
                "bootm $load_addr#$board\0"
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#undef QSPI_NOR_BOOTCOMMAND
+#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
+                            "env exists secureboot && esbc_halt;"
+#else
 #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
                           "env exists secureboot && esbc_halt;"
+#endif
 
 #include <asm/fsl_secure_boot.h>