MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
directly. We now can simply enable the macro and use the driver.
Other mpc83xx SoCs still use their own driver.
Signed-off-by: York Sun <yorksun@freescale.com>
# Stub implementations of cache management functions for USB
obj-y += cache.o
-ifdef CONFIG_SYS_FSL_DDR2
-obj-$(CONFIG_MPC8349) += $(SRCTREE)/drivers/ddr/fsl/mpc85xx_ddr_gen2.o
-else
+ifndef CONFIG_SYS_FSL_DDRC_GEN2
obj-y += spd_sdram.o
endif
obj-$(CONFIG_SYS_FSL_DDR2) += law.o
*/
#define CONFIG_SYS_FSL_DDR2
#ifdef CONFIG_SYS_FSL_DDR2
+#define CONFIG_SYS_FSL_DDRC_GEN2
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS1 0x52
#define SPD_EEPROM_ADDRESS2 0x51