powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)

CoreNet Platform Cache single-bit tag error scrubbing will cause tag
corruption.  Disable the feature to workaround the issue.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 4e2cb4a6401554bbf6d3f3d8b3e64a9bea9df8c3..ae6af4f96746f51e4881fbbebd021527ee559a88 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -59,6 +59,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC136)
        puts("Work-around for Erratum ESDHC136 enabled\n");
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
+       puts("Work-around for Erratum CPC-A002 enabled\n");
+#endif
+
        return 0;
 }
 

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 354b22231474a7edeb82bacbc57d39c931d03a92..c822d871aec157e13b3a9331c0cdec8320249461 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -142,6 +142,10 @@ static void enable_cpc(void)
                u32 cpccfg0 = in_be32(&cpc->cpccfg0);
                size += CPC_CFG0_SZ_K(cpccfg0);
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
+               setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS);
+#endif
+
                out_be32(&cpc->cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE);
                /* Read back to sync write */
                in_be32(&cpc->cpccsr0);

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 30c64ebb17d05ef26819d62e9bad4b835fd0f752..6b19ee858632b107d10225fe35872c55d8c6566f 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1,7 +1,7 @@
 /*
  * MPC85xx Internal Memory Map
  *
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
  *
  * Copyright(c) 2002,2003 Motorola Inc.
  * Xianghua Xiao (x.xiao@motorola.com)
@@ -1619,6 +1619,7 @@ typedef struct cpc_corenet {
 #define CPC_SRCR0_SRAMEN       0x00000001
 #define        CPC_ERRDIS_TMHITDIS     0x00000080      /* multi-way hit disable */
 #define CPC_HDBCR0_CDQ_SPEC_DIS        0x08000000
+#define CPC_HDBCR0_TAG_ECC_SCRUB_DIS   0x01000000
 #endif /* CONFIG_SYS_FSL_CPC */
 
 /* Global Utilities Block */

diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index 4dd7faa1bb176e892a5d41a13eec98652c55826a..950c8bcaf609ff0d68363ebddfabbfcc119fdea8 100644 (file)
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -40,6 +40,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_ESDHC136
 
 #define CONFIG_SYS_P4080_ERRATUM_CPU22
+#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
 #define CONFIG_SYS_P4080_ERRATUM_SERDES8
 
 #include "corenet_ds.h"