Removal of the old set_clocks cmd

diff --git a/u-boot/common/cmd_custom.c b/u-boot/common/cmd_custom.c
index 95697af13da0c6c5fe3c035b6493e6f9956b0340..a4ef2eeb21aceaa9912e20a261138957d880e6ab 100755 (executable)
--- a/u-boot/common/cmd_custom.c
+++ b/u-boot/common/cmd_custom.c
@@ -314,179 +314,6 @@ U_BOOT_CMD(printclocks, 1, 1, do_print_clocks, "print CPU, RAM, AHB, SPI and REF
 #endif /* #if defined(CONFIG_MACH_HORNET) */
 
 #if defined(PLL_IN_FLASH_MAGIC_OFFSET)
-/*
- * Set and store PLL configuration in FLASH
- */
-int do_set_clocks(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]){
-       unsigned int outdiv, range, refdiv, divint, cpu_div, ram_div, ahb_div, spi_div;
-       unsigned int cpu_pll_config_reg_val = 0;
-       unsigned int clock_control_reg_val  = 0;
-       unsigned int spi_control_reg_val    = 0;
-       unsigned char *data_pointer;
-       int i;
-       char buf[128];
-
-       // allow only 9 arg (command name + range refdiv divint outdiv cpu_div ram_div ahb_div spi_div)
-       if(argc != 9){
-               puts("** Notice: you should always make a backup of your device\n           entire FLASH content before making any changes\n\n");
-
-#ifdef CFG_LONGHELP
-               if(cmdtp->help != NULL){
-                       printf("Usage:\n%s %s\n", cmdtp->name, cmdtp->help);
-               } else {
-                       printf("Usage:\n%s %s\n", cmdtp->name, cmdtp->usage);
-               }
-#else
-               printf("Usage:\n%s %s\n", cmdtp->name, cmdtp->usage);
-#endif
-               return(1);
-       }
-
-       // range validation
-       range = simple_strtoul(argv[1], NULL, 10);
-
-       if(range != 1 && range != 0){
-               puts("## Error: range should be 0 or 1!\n");
-               return(1);
-       }
-
-       // refdiv validation (5 bits)
-       refdiv = simple_strtoul(argv[2], NULL, 10);
-
-       if(refdiv > 31 || refdiv < 1){
-               puts("## Error: refdiv should be in range 1..31!\n");
-               return(1);
-       }
-
-       // divint validation (6 bits)
-       divint = simple_strtoul(argv[3], NULL, 10);
-
-       if(divint > 63 || divint < 1){
-               puts("## Error: divint should be in range 1..63!\n");
-               return(1);
-       }
-
-       // outdiv validation (3 bits)
-       outdiv = simple_strtoul(argv[4], NULL, 10);
-
-       if(outdiv > 7 || outdiv < 1){
-               puts("## Error: outdiv should be in range 1..7!\n");
-               return(1);
-       }
-
-       // cpu_div validation (2 bits)
-       cpu_div = simple_strtoul(argv[5], NULL, 10);
-
-       if(cpu_div > 4 || cpu_div < 1){
-               puts("## Error: cpu_div should be in range 1..4!\n");
-               return(1);
-       }
-
-       // ram_div validation (2 bits)
-       ram_div = simple_strtoul(argv[6], NULL, 10);
-
-       if(ram_div > 4 || ram_div < 1){
-               puts("## Error: ram_div should be in range 1..4!\n");
-               return(1);
-       }
-
-       // ahb_div validation (2 bits)
-       ahb_div = simple_strtoul(argv[7], NULL, 10);
-
-       if(ahb_div > 4 || ahb_div < 1){
-               puts("## Error: ahb_div should be in range 1..4!\n");
-               return(1);
-       }
-
-       // spi_div validation (6 bits)
-       spi_div = simple_strtoul(argv[8], NULL, 10);
-
-       if(spi_div > 128 || spi_div < 4 || (spi_div % 2)){
-               puts("## Error: spi_div should be even and in range 4..128!\n");
-               return(1);
-       }
-
-       // SPI CLK = (AHB_CLK / ((CLOCK_DIVIDER + 1) * 2)),
-       // spi_div = 2 * (CLOCK_DIVIDER + 1)
-       // we need CLOCK_DIVIDER:
-       spi_div /= 2;
-       spi_div--;
-
-       puts("Calculated registers values:\n");
-
-       // calculate registers values
-       // MAKE_CPU_PLL_CONFIG_VAL(divint, refdiv, range, outdiv)
-       cpu_pll_config_reg_val = (unsigned int)(MAKE_CPU_PLL_CONFIG_VAL(divint, refdiv, range, outdiv));
-       printf("- CPU_PLL_CONFIG: 0x%08X\n", cpu_pll_config_reg_val);
-
-       // MAKE_CPU_CLK_CONTROL_VAL(cpudiv, ddrdiv, ahbdiv)
-       clock_control_reg_val = (unsigned int)(MAKE_CPU_CLK_CONTROL_VAL(cpu_div, ram_div, ahb_div));
-       printf("- CLOCK_CONTROL:  0x%08X\n", clock_control_reg_val);
-
-       // SPI_CONTROL
-       spi_control_reg_val = (unsigned int)(0x40 | spi_div);
-       printf("- SPI_CONTROL:    0x%08X\n\n", spi_control_reg_val);
-
-       // backup entire block in which we store PLL/CLK settings
-       data_pointer = (unsigned char *)WEBFAILSAFE_UPLOAD_RAM_ADDRESS;
-
-       if(!data_pointer){
-               puts("## Error: couldn't allocate RAM for data block backup!\n");
-               return(1);
-       }
-
-       puts("** Notice: you should always make a backup of your device\n           entire FLASH content before making any changes\n\n");
-
-       memcpy((void *)data_pointer, (void *)(CFG_FLASH_BASE + PLL_IN_FLASH_DATA_BLOCK_OFFSET), PLL_IN_FLASH_DATA_BLOCK_LENGTH);
-
-       // save PLL_IN_FLASH_MAGIC
-       for(i = 0; i < 4; i++){
-               data_pointer[PLL_IN_FLASH_MAGIC_OFFSET + i] = 0xFF & (PLL_IN_FLASH_MAGIC >> (8 * (3 - i)));
-       }
-
-       // save CPU_PLL_CONFIG
-       for(i = 0; i < 4; i++){
-               data_pointer[PLL_IN_FLASH_MAGIC_OFFSET + 4 + i] = 0xFF & (cpu_pll_config_reg_val >> (8 * (3 - i)));
-       }
-
-       // save CLOCK_CONTROL
-       for(i = 0; i < 4; i++){
-               data_pointer[PLL_IN_FLASH_MAGIC_OFFSET + 8 + i] = 0xFF & (clock_control_reg_val >> (8 * (3 - i)));
-       }
-
-       // save SPI_CONTROL
-       for(i = 0; i < 4; i++){
-               data_pointer[PLL_IN_FLASH_MAGIC_OFFSET + 12 + i] = 0xFF & (spi_control_reg_val >> (8 * (3 - i)));
-       }
-
-       // erase FLASH, copy data from RAM
-       sprintf(buf,
-                       "erase 0x%lX +0x%lX; cp.b 0x%lX 0x%lX 0x%lX",
-                       CFG_FLASH_BASE + PLL_IN_FLASH_DATA_BLOCK_OFFSET,
-                       PLL_IN_FLASH_DATA_BLOCK_LENGTH,
-                       WEBFAILSAFE_UPLOAD_RAM_ADDRESS,
-                       CFG_FLASH_BASE + PLL_IN_FLASH_DATA_BLOCK_OFFSET,
-                       PLL_IN_FLASH_DATA_BLOCK_LENGTH);
-
-       printf("Executing: %s\n\n", buf);
-
-       return(run_command(buf, 0));
-}
-
-U_BOOT_CMD(setclocks, 9, 0, do_set_clocks, "set PLL and clocks configuration in FLASH\n",
-               "range refdiv divint outdiv cpu_div ram_div ahb_div spi_div\n"
-               "\t- calculates and stores CPU_PLL_CONFIG and CLOCK_CONTROL registers in FLASH\n"
-               "\t- default configuration for 400/400/200/33 MHz:\n"
-               "\t  0 1 32 1 1 1 2 6 (25 MHz ref, PLL -> ((25 / 1) * 32) / (1 / 2 ^ 1) = 400 MHz)\n"
-               "\t  0 1 20 1 1 1 2 6 (40 MHz ref, PLL -> ((40 / 1) * 20) / (1 / 2 ^ 1) = 400 MHz)\n\n"
-               "\t- formulas for PLL and clocks calculations:\n"
-               "\t  PLL = ((ref / refdiv) * divint) / (1 / (2 ^ outdiv))\n"
-               "\t  CPU = PLL / cpu_div\n"
-               "\t  RAM = PLL / ram_div\n"
-               "\t  AHB = PLL / ahb_div\n"
-               "\t  SPI = AHB / spi_div\n\n"
-               "\t  *ref - reference clock (25 or 40 MHz)\n");
-
 /*
  * Remove (clear) PLL and clock settings in FLASH
  */