powerpc/85xx: Enable eSDHC boot support on P2020 DS
authorJerry Huang <Chang-Ming.Huang@freescale.com>
Mon, 24 Jan 2011 17:09:54 +0000 (17:09 +0000)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 5 Apr 2011 03:26:32 +0000 (22:26 -0500)
We implement our own mmc_get_env_addr since the environment variables are
written to just after the u-boot image on SDCard, so we must read the MBR
to get the start address and code length of the u-boot image, then
calculate the address of the env.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/freescale/common/Makefile
board/freescale/common/sdhc_boot.c [new file with mode: 0644]
board/freescale/p2020ds/tlb.c
boards.cfg
include/configs/P2020DS.h

index 1abd3e56703b014d0a0085ae332d139e8634e170..8ea5acb5de47197c0bbb0d152a83a88f8aef8795 100644 (file)
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_FSL_NGPIXIS)   += ngpixis.o
 COBJS-$(CONFIG_PQ_MDS_PIB)     += pq-mds-pib.o
 COBJS-$(CONFIG_ID_EEPROM)      += sys_eeprom.o
 COBJS-$(CONFIG_FSL_SGMII_RISER)        += sgmii_riser.o
+COBJS-$(CONFIG_ENV_IS_IN_MMC)  += sdhc_boot.o
 
 COBJS-$(CONFIG_MPC8541CDS)     += cds_pci_ft.o
 COBJS-$(CONFIG_MPC8548CDS)     += cds_pci_ft.o
diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c
new file mode 100644 (file)
index 0000000..964c6b8
--- /dev/null
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include <malloc.h>
+
+/*
+ * The environment variables are written to just after the u-boot image
+ * on SDCard, so we must read the MBR to get the start address and code
+ * length of the u-boot image, then calculate the address of the env.
+ */
+#define ESDHC_BOOT_IMAGE_SIZE  0x48
+#define ESDHC_BOOT_IMAGE_ADDR  0x50
+
+int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
+{
+       u8 *tmp_buf;
+       u32 blklen, code_offset, code_len, n;
+
+       blklen = mmc->read_bl_len;
+       tmp_buf = malloc(blklen);
+       if (!tmp_buf)
+               return 1;
+
+       /* read out the first block, get the config data information */
+       n = mmc->block_dev.block_read(mmc->block_dev.dev, 0, 1, tmp_buf);
+       if (!n) {
+               free(tmp_buf);
+               return 1;
+       }
+
+       /* Get the Source Address, from offset 0x50 */
+       code_offset = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_ADDR);
+
+       /* Get the code size from offset 0x48 */
+       code_len = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_SIZE);
+
+       *env_addr = code_offset + code_len;
+
+       free(tmp_buf);
+
+       return 0;
+}
+
index 824b3b29f08aace97855143b6dd3f57b437db46a..fd914a16a8cbd05f3f6eaad12c4918219b6f7465 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -90,6 +90,17 @@ struct fsl_e_tlb_entry tlb_table[] = {
        SET_TLB_ENTRY(1, PIXIS_BASE, PIXIS_BASE_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 8, BOOKE_PAGESZ_4K, 1),
+
+#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
+       /* *I*G - L2SRAM */
+       SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 9, BOOKE_PAGESZ_256K, 1),
+       SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
+                     CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 10, BOOKE_PAGESZ_256K, 1),
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);
index 2622f787b6f66850e7b407963d285d32302b88d7..a96e7cf5f560cc5e19a345caeaec23e2a36aeb35 100644 (file)
@@ -534,6 +534,7 @@ P2010RDB_SPIFLASH            powerpc     mpc85xx     p1_p2_rdb           freesca
 P2020DS                      powerpc     mpc85xx     p2020ds             freescale
 P2020DS_36BIT                powerpc     mpc85xx     p2020ds             freescale      -           P2020DS:36BIT
 P2020DS_DDR2                 powerpc     mpc85xx     p2020ds             freescale      -           P2020DS:DDR2
+P2020DS_SDCARD               powerpc     mpc85xx     p2020ds             freescale      -           P2020DS:SDCARD
 P2020RDB                     powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P2020RDB
 P2020RDB_36BIT               powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P2020RDB,36BIT
 P2020RDB_36BIT_SDCARD        powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P2020RDB,36BIT,SDCARD
index 1815191f592207dc03d929313f79076348f0f3aa..30da7b1d45eab4366738c5a5155e7f962b2fb6c4 100644 (file)
 #define CONFIG_PHYS_64BIT
 #endif
 
+#ifdef CONFIG_SDCARD
+#define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_SYS_TEXT_BASE           0xf8f80000
+#define CONFIG_RESET_VECTOR_ADDRESS    0xf8fffffc
+#endif
+
 /* High Level Configuration Options */
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
 #define CONFIG_SYS_MEMTEST_END         0x00400000
 #define CONFIG_PANIC_HANG      /* do not reset board on panic */
 
+/*
+ * Config the L2 Cache
+ */
+#define CONFIG_SYS_INIT_L2_ADDR                0xf8f80000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS   0xff8f80000ull
+#else
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS   CONFIG_SYS_INIT_L2_ADDR
+#endif
+#define CONFIG_SYS_L2_SIZE             (512 << 10)
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+
 /*
  * Base addresses -- Note these are effective addresses where the
  * actual resources get mapped (not physical addresses)
 /*
  * Environment
  */
+#if defined(CONFIG_SDCARD)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_SIZE                        0x2000
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#else
 #define CONFIG_ENV_IS_IN_FLASH 1
 #if CONFIG_SYS_MONITOR_BASE > 0xfff80000
 #define CONFIG_ENV_ADDR                0xfff80000
 #endif
 #define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_ENV_SECT_SIZE   0x20000 /* 128K (one sector) */
+#endif
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change */