mpc83xx: enable eLBC NAND support for MPC8315ERDB board
authorDave Liu <daveliu@freescale.com>
Tue, 4 Nov 2008 06:55:06 +0000 (14:55 +0800)
committerScott Wood <scottwood@freescale.com>
Fri, 23 Jan 2009 16:32:45 +0000 (10:32 -0600)
Signed-off-by: Dave Liu <daveliu@freescale.com>
include/configs/MPC8315ERDB.h

index add65f03d059166fd5ae77cd18d8e7b0645dca78..48043c493fea89f22d9e3d948d6ee4644f0459d9 100644 (file)
 #undef CONFIG_SYS_RAMBOOT
 #endif
 
-#define CONFIG_SYS_MONITOR_LEN         (256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN         (384 * 1024) /* Reserve 384 kB for Mon */
 #define CONFIG_SYS_MALLOC_LEN          (512 * 1024) /* Reserved for malloc */
 
 /*
  */
 #define CONFIG_SYS_NAND_BASE           0xE0600000      /* 0xE0600000 */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define NAND_MAX_CHIPS                 1
+#define CONFIG_MTD_NAND_VERIFY_WRITE   1
+#define CONFIG_CMD_NAND                        1
+#define CONFIG_NAND_FSL_ELBC           1
 
-#define CONFIG_SYS_BR1_PRELIM          ( CONFIG_SYS_NAND_BASE \
+#define CONFIG_SYS_BR1_PRELIM  ( CONFIG_SYS_NAND_BASE \
                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
                                | BR_PS_8               /* Port Size = 8 bit */ \
                                | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V )                /* valid */
-#define CONFIG_SYS_OR1_PRELIM          ( 0xFFFF8000            /* length 32K */ \
+#define CONFIG_SYS_OR1_PRELIM  ( 0xFFFF8000            /* length 32K */ \
                                | OR_FCM_CSCT \
                                | OR_FCM_CST \
                                | OR_FCM_CHT \