arm: omap3: Bring back ARM errata workaround 725233

The workaround for ARM errata 725233 had been lost since
commit 45bf05854bc94e (armv7: adapt omap3 to the new cache
maintenance framework). Bring it back in order to avoid
very difficult to reproduce, but actually encountered in
the wild CPU deadlocks when running software rendered
X11 desktop on OMAP3530 hardware.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Migrate to Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0a05662e7cec6b9f212cd1e2b4a7435d4668495d..6f4c8ac868405a831ab35b1081d5ef5714e902a9 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -43,6 +43,9 @@ config ARM_ERRATA_621766
 config ARM_ERRATA_716044
        bool
 
+config ARM_ERRATA_725233
+       bool
+
 config ARM_ERRATA_742230
        bool
 
@@ -638,6 +641,7 @@ config OMAP34XX
        select ARM_ERRATA_430973
        select ARM_ERRATA_454179
        select ARM_ERRATA_621766
+       select ARM_ERRATA_725233
        select USE_TINY_PRINTF
        imply SPL_EXT_SUPPORT
        imply SPL_FAT_SUPPORT

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 7eee54ba700211f27265cbbe86b816b24f3acc93..1a6aee94424222696f3976bd461d92ccbd9f647b 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -268,6 +268,19 @@ skip_errata_430973:
        pop     {r1-r5}                 @ Restore the cpu info - fall through
 
 skip_errata_621766:
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_725233
+       cmp     r2, #0x21               @ Only on < r2p1 (Cortex A8)
+       bge     skip_errata_725233
+
+       mrc     p15, 1, r0, c9, c0, 2   @ Read L2ACR
+       orr     r0, r0, #(0x1 << 27)    @ L2 PLD data forwarding disable
+       push    {r1-r5}                 @ Save the cpu info registers
+       bl      v7_arch_cp15_set_l2aux_ctrl
+       pop     {r1-r5}                 @ Restore the cpu info - fall through
+
+skip_errata_725233:
 #endif
 
        mov     pc, r5                  @ back to my caller

diff --git a/arch/arm/include/asm/arch-omap3/omap.h b/arch/arm/include/asm/arch-omap3/omap.h
index 91d73c2f1d619da21dc252231256fb27259bb299..db763e49a327721be7a61b8b459140e3af6557d0 100644 (file)
--- a/arch/arm/include/asm/arch-omap3/omap.h
+++ b/arch/arm/include/asm/arch-omap3/omap.h
@@ -243,6 +243,7 @@ struct gpio {
  * ROM code API related flags
  */
 #define OMAP3_GP_ROMCODE_API_L2_INVAL          1
+#define OMAP3_GP_ROMCODE_API_WRITE_L2ACR       2
 #define OMAP3_GP_ROMCODE_API_WRITE_ACR         3
 
 /*

diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index a727226563cbc871c9a923ef91cbc03c7c9acb3a..f1436fbf519217a6fbed9f87911520a90fd51425 100644 (file)
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -364,6 +364,16 @@ void __weak omap3_set_aux_cr_secure(u32 acr)
                               (u32 *)&emu_romcode_params);
 }
 
+void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
+                                u32 cpu_rev_comb, u32 cpu_variant,
+                                u32 cpu_rev)
+{
+       if (get_device_type() == GP_DEVICE)
+               omap_smc1(OMAP3_GP_ROMCODE_API_WRITE_L2ACR, l2auxctrl);
+
+       /* L2 Cache Auxiliary Control Register is not banked */
+}
+
 void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
                          u32 cpu_variant, u32 cpu_rev)
 {