# 0x23 ZM_INTR_SOURCE_2_OFFSET
# 0x24 ZM_INTR_SOURCE_3_OFFSET
# 0x25 ZM_INTR_SOURCE_4_OFFSET
-* BIT6 - vUsb_Reg_Out()?
+* BIT7 - End of data.
+* BIT6 - vUsb_Reg_Out(). Pending data in fifo for EP4. We need to read it out.
+Comments: we can read only 64bytes per time. If pending data is less then 64bytes or it is end of packet, then BIT6 and BIT7 will be set. If not, then only BIT6 is set.
# 0x26 ZM_INTR_SOURCE_5_OFFSET
these endpoints are handled by DMA