rockchip: rk3368: enable stimer for rk3368

Add stimer_init() for spl/tpl so that we able to switch
to use arch timer.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
index 3a7d0b640aeba97d7679a5e212f57d69eda934de..6ba106c63bd88ebf633370c792c3f17650fb0588 100644 (file)
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -16,6 +16,28 @@ __weak int arch_cpu_init(void)
        return 0;
 }
 
+#define TIMER_LOAD_COUNT_L     0x00
+#define TIMER_LOAD_COUNT_H     0x04
+#define TIMER_CONTROL_REG      0x10
+#define TIMER_EN       0x1
+#define        TIMER_FMODE     BIT(0)
+#define        TIMER_RMODE     BIT(1)
+
+void rockchip_stimer_init(void)
+{
+       /* If Timer already enabled, don't re-init it */
+       u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+
+       if (reg & TIMER_EN)
+               return;
+
+       writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+       writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
+              TIMER_CONTROL_REG);
+}
+
 void board_init_f(ulong dummy)
 {
        struct udevice *dev;
@@ -27,6 +49,11 @@ void board_init_f(ulong dummy)
                hang();
        }
 
+       /* Init secure timer */
+       rockchip_stimer_init();
+       /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+       timer_init();
+
        arch_cpu_init();
        preloader_console_init();
 

diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index a1da8ccb0f0c81c44f920de62074f3b5c87f2105..fdb1c3b365530f2c5a38f090da2bfc06e990baae 100644 (file)
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -11,6 +11,22 @@
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 
+#define TIMER_LOAD_COUNT_L     0x00
+#define TIMER_LOAD_COUNT_H     0x04
+#define TIMER_CONTROL_REG      0x10
+#define TIMER_EN       0x1
+#define        TIMER_FMODE     BIT(0)
+#define        TIMER_RMODE     BIT(1)
+
+__weak void rockchip_stimer_init(void)
+{
+       writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+       writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+       writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
+              TIMER_CONTROL_REG);
+}
+
 void board_init_f(ulong dummy)
 {
        struct udevice *dev;
@@ -35,6 +51,11 @@ void board_init_f(ulong dummy)
                hang();
        }
 
+       /* Init secure timer */
+       rockchip_stimer_init();
+       /* Init ARM arch timer in arch/arm/cpu/ */
+       timer_init();
+
        ret = uclass_get_device(UCLASS_RAM, 0, &dev);
        if (ret) {
                debug("DRAM init failed: %d\n", ret);

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 13630ba386cf8b18ed3932c46996b83624d7abe8..8a1e3118aebfc4456d198ba061a173bc96ac8843 100644 (file)
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -20,7 +20,8 @@
 #define CONFIG_SYS_CBSIZE              1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define COUNTER_FREQUENCY               24000000
+#define CONFIG_ROCKCHIP_STIMER_BASE    0xff830020
+#define COUNTER_FREQUENCY              24000000
 
 #define CONFIG_SYS_NS16550_MEM32