dm: reset: add BCM6345 reset driver
authorÁlvaro Fernández Rojas <noltari@gmail.com>
Wed, 3 May 2017 13:10:21 +0000 (15:10 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wed, 10 May 2017 14:16:09 +0000 (16:16 +0200)
This is a simplified version of linux/arch/mips/bcm63xx/reset.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
drivers/reset/Kconfig
drivers/reset/Makefile
drivers/reset/reset-bcm6345.c [new file with mode: 0644]

index 80f4646a79c5e6bd5470b00f17fb723b67b3e1b1..e6af7da8fe59292f4238e23b3ccef29b9c72986c 100644 (file)
@@ -42,6 +42,12 @@ config TEGRA186_RESET
          Enable support for manipulating Tegra's on-SoC reset signals via IPC
          requests to the BPMP (Boot and Power Management Processor).
 
+config RESET_BCM6345
+       bool "Reset controller driver for BCM6345"
+       depends on DM_RESET && ARCH_BMIPS
+       help
+         Support reset controller on BCM6345.
+
 config RESET_UNIPHIER
        bool "Reset controller driver for UniPhier SoCs"
        depends on ARCH_UNIPHIER
index 630b4b4e541c1ef2e1ab7382454b1f401d64e470..d5e06c2241d7648ac0d812ff5e9719e03f961467 100644 (file)
@@ -8,5 +8,6 @@ obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
 obj-$(CONFIG_STI_RESET) += sti-reset.o
 obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
 obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
+obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
 obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
new file mode 100644 (file)
index 0000000..774c2a7
--- /dev/null
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/bcm63xx/reset.c:
+ *     Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <reset-uclass.h>
+#include <asm/io.h>
+
+#define MAX_RESETS     32
+
+struct bcm6345_reset_priv {
+       void __iomem *regs;
+};
+
+static int bcm6345_reset_assert(struct reset_ctl *rst)
+{
+       struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev);
+
+       clrbits_be32(priv->regs, BIT(rst->id));
+       mdelay(20);
+
+       return 0;
+}
+
+static int bcm6345_reset_deassert(struct reset_ctl *rst)
+{
+       struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev);
+
+       setbits_be32(priv->regs, BIT(rst->id));
+       mdelay(20);
+
+       return 0;
+}
+
+static int bcm6345_reset_free(struct reset_ctl *rst)
+{
+       return 0;
+}
+
+static int bcm6345_reset_request(struct reset_ctl *rst)
+{
+       if (rst->id >= MAX_RESETS)
+               return -EINVAL;
+
+       return bcm6345_reset_assert(rst);
+}
+
+struct reset_ops bcm6345_reset_reset_ops = {
+       .free = bcm6345_reset_free,
+       .request = bcm6345_reset_request,
+       .rst_assert = bcm6345_reset_assert,
+       .rst_deassert = bcm6345_reset_deassert,
+};
+
+static const struct udevice_id bcm6345_reset_ids[] = {
+       { .compatible = "brcm,bcm6345-reset" },
+       { /* sentinel */ }
+};
+
+static int bcm6345_reset_probe(struct udevice *dev)
+{
+       struct bcm6345_reset_priv *priv = dev_get_priv(dev);
+       fdt_addr_t addr;
+       fdt_size_t size;
+
+       addr = dev_get_addr_size_index(dev, 0, &size);
+       if (addr == FDT_ADDR_T_NONE)
+               return -EINVAL;
+
+       priv->regs = ioremap(addr, size);
+
+       return 0;
+}
+
+U_BOOT_DRIVER(bcm6345_reset) = {
+       .name = "bcm6345-reset",
+       .id = UCLASS_RESET,
+       .of_match = bcm6345_reset_ids,
+       .ops = &bcm6345_reset_reset_ops,
+       .probe = bcm6345_reset_probe,
+       .priv_auto_alloc_size = sizeof(struct bcm6345_reset_priv),
+};