e1000: fix sw fw sync on igb i210/i211
authorMarcel Ziswiler <marcel@ziswiler.com>
Tue, 21 Oct 2014 12:26:36 +0000 (14:26 +0200)
committerTom Rini <trini@ti.com>
Mon, 27 Oct 2014 21:54:10 +0000 (17:54 -0400)
I finally had a look at the datasheet and spotted an additional
register address difference between regular E1000 and i210/i211 chips.
This patch fixes this and now successfully works on programmed
i210/i211 as well as unprogrammed i211.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
drivers/net/e1000.c
drivers/net/e1000.h

index b092867272f5bbc7c9a84eeda6777f22ee5e2abc..798c8aa02c7a688baafb25340dfaa74cab7425cc 100644 (file)
@@ -1112,7 +1112,10 @@ e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask)
                if (e1000_get_hw_eeprom_semaphore(hw))
                        return -E1000_ERR_SWFW_SYNC;
 
-               swfw_sync = E1000_READ_REG(hw, SW_FW_SYNC);
+               if (hw->mac_type == e1000_igb)
+                       swfw_sync = E1000_READ_REG(hw, I210_SW_FW_SYNC);
+               else
+                       swfw_sync = E1000_READ_REG(hw, SW_FW_SYNC);
                if (!(swfw_sync & (fwmask | swmask)))
                        break;
 
@@ -4429,7 +4432,6 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
 
                if (hw->mac_type >= e1000_82571)
                        mdelay(10);
-
        } else {
                /* Read the Extended Device Control Register, assert the PHY_RESET_DIR
                 * bit to put the PHY into reset. Then, take it out of reset.
index b025ecc4fc5a66d8942da1e7f9306dc5913c2a41..6d110eb5d567a14270146c0c0bcdc4d267351e85 100644 (file)
@@ -2497,6 +2497,7 @@ struct e1000_hw {
 #define ICH_GFPREG_BASE_MASK       0x1FFF
 #define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
 
+#define E1000_I210_SW_FW_SYNC 0x5B50 /* Software-Firmware Synchronization - RW */
 #define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */
 
 /* SPI EEPROM Status Register */