return 0;
}
-void reset_timer_masked (void)
-{
- /* reset time */
- gd->lastinc = GPTCNT; /* capture current incrementer value time */
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
unsigned long long get_ticks (void)
{
ulong now = GPTCNT; /* current tick value */
DECLARE_GLOBAL_DATA_PTR;
+static void reset_timer_masked (void)
+{
+ /* reset time */
+ gd->lastinc = READ_TIMER; /* capture current incrementer value time */
+ gd->tbl = 0; /* start "advancing" time stamp from 0 */
+}
+
int timer_init (void)
{
int32_t val;
/*NOP*/;
}
-void reset_timer_masked (void)
-{
- /* reset time */
- gd->lastinc = READ_TIMER; /* capture current incrementer value time */
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
ulong get_timer_masked (void)
{
ulong now = READ_TIMER; /* current tick value */
return (ulong)(timer_load_val / 100);
}
-void reset_timer_masked(void)
-{
- /* reset time */
- lastdec = read_timer();
- timestamp = 0;
-}
-
ulong get_timer_masked(void)
{
unsigned long long res = get_ticks();
#endif
}
-void reset_timer_masked (void)
-{
- /* reset time */
- lastdec = READ_TIMER;
- timestamp = 0;
-}
-
ulong get_timer_masked (void)
{
ulong now = READ_TIMER;
udelay_masked(usec);
}
-void reset_timer_masked(void)
-{
- /* reset time */
- at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
- gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
- gd->tbl = 0;
-}
-
ulong get_timer_raw(void)
{
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
udelay_masked(usec);
}
-void reset_timer_masked (void)
-{
- /* reset time */
- lastinc = READ_TIMER;
- timestamp = 0;
-}
-
ulong get_timer_raw (void)
{
ulong now = READ_TIMER;
return get_timer_masked() - base;
}
-void reset_timer_masked(void)
-{
- read_timer();
- timer.ticks = 0;
-}
-
void __udelay(unsigned long usec)
{
unsigned long long target;
writel(TIMER_ENABLE | TIMER_CLKSEL,
&timer_regs->timer3.control);
- reset_timer_masked();
+ /* Reset the timer */
+ read_timer();
+ timer.ticks = 0;
return 0;
}
TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
- reset_timer_masked();
+ /* Reset the timer */
+ TCTL1 &= ~TCTL_TEN;
+ TCTL1 |= TCTL_TEN; /* Enable timer */
return (0);
}
return get_timer_masked() - base;
}
-void reset_timer_masked (void)
-{
- TCTL1 &= ~TCTL_TEN;
- TCTL1 |= TCTL_TEN; /* Enable timer */
-}
-
ulong get_timer_masked (void)
{
return TCN1;
int timer_init (void)
{
- reset_timer_masked();
+ /* Set the hadware timer for 1ms */
+ ks8695_write(KS8695_TIMER1, TIMER_COUNT);
+ ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
+ ks8695_write(KS8695_TIMER_CTRL, 0x2);
+ timer_ticks = 0;
return 0;
}
#define TIMER_COUNT (TIMER_INTERVAL / 2)
#define TIMER_PULSE TIMER_COUNT
-void reset_timer_masked(void)
-{
- /* Set the hadware timer for 1ms */
- ks8695_write(KS8695_TIMER1, TIMER_COUNT);
- ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
- ks8695_write(KS8695_TIMER_CTRL, 0x2);
- timer_ticks = 0;
-}
-
ulong get_timer_masked(void)
{
/* Check for timer wrap */
/*NOP*/;
}
-void reset_timer_masked(void)
-{
- /* reset time */
- lastdec = READ_TIMER();
- timestamp = 0;
-}
-
ulong get_timer_masked(void)
{
ulong tmr = get_ticks();
CONFIG_SYS_TIMERBASE + CNTL_TIMER);
/* init the timestamp and lastdec value */
- reset_timer_masked();
+ lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
+ (TIMER_CLOCK / CONFIG_SYS_HZ);
+ timestamp = 0; /* start "advancing" time stamp from 0 */
return 0;
}
}
}
-void reset_timer_masked (void)
-{
- /* reset time */
- lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
- (TIMER_CLOCK / CONFIG_SYS_HZ);
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
ulong get_timer_masked (void)
{
uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
return(readl(&armd1timers->cvwr));
}
-void reset_timer_masked(void)
-{
- /* reset time */
- gd->tbl = read_timer();
- gd->tbu = 0;
-}
-
ulong get_timer_masked(void)
{
ulong now = read_timer();
/* Enable timer 0 */
writel(0x1, &armd1timers->cer);
/* init the gd->tbu and gd->tbl value */
- reset_timer_masked();
+ gd->tbl = read_timer();
+ gd->tbu = 0;
return 0;
}
#define timestamp gd->tbl
#define lastdec gd->lastinc
-void reset_timer_masked(void)
-{
- /* reset time */
- lastdec = READ_TIMER;
- timestamp = 0;
-}
-
ulong get_timer_masked(void)
{
ulong now = READ_TIMER;
writel(cntmrctrl, CNTMR_CTRL_REG);
/* init the timestamp and lastdec value */
- reset_timer_masked();
+ lastdec = READ_TIMER;
+ timestamp = 0;
return 0;
}
writel(ctrl, &timer->control);
- reset_timer_masked();
+ /* capture current value time */
+ lastdec = readl(&timer->value);
+ timestamp = 0; /* start "advancing" time stamp from 0 */
return 0;
}
return timestamp;
}
-void reset_timer_masked(void)
-{
- struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
- MB86R0x_TIMER_BASE;
-
- /* capture current value time */
- lastdec = readl(&timer->value);
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
ulong get_timer_masked(void)
{
return tick_to_time(get_ticks());
return 0;
}
-void reset_timer_masked(void)
-{
- struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
- /* reset time */
- /* capture current incrementer value time */
- lastinc = readl(&gpt->counter);
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
unsigned long long get_ticks (void)
{
struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
return 0;
}
-void reset_timer_masked(void)
-{
- struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
- /* reset time */
- /* capture current incrementer value time */
- lastinc = readl(®s->gpt_tcn);
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
unsigned long long get_ticks (void)
{
struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
#define timestamp gd->tbl
#define lastdec gd->lastinc
-void reset_timer_masked(void)
-{
- /* reset time */
- lastdec = read_timer();
- timestamp = 0;
-}
-
ulong get_timer_masked(void)
{
ulong now = read_timer();
void timer_init_r(void)
{
/* init the timestamp and lastdec value */
- reset_timer_masked();
+ lastdec = read_timer();
+ timestamp = 0;
}
return val;
}
-void reset_timer_masked(void)
-{
- /* reset time */
- gd->tbl = read_timer();
- gd->tbu = 0;
-}
-
ulong get_timer_masked(void)
{
ulong now = read_timer();
/* Enable timer 0 */
writel(0x1, &panthtimers->cer);
/* init the gd->tbu and gd->tbl value */
- reset_timer_masked();
+ gd->tbl = read_timer();
+ gd->tbu = 0;
return 0;
}
/* auto reload, start timer */
writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
- reset_timer_masked();
+ /* Reset the timer */
+ lastdec = READ_TIMER();
+ timestamp = 0;
return 0;
}
;
}
-void reset_timer_masked(void)
-{
- /* reset time */
- lastdec = READ_TIMER();
- timestamp = 0;
-}
-
ulong get_timer_masked(void)
{
ulong now = READ_TIMER();
int timer_init(void)
{
int i;
+ ulong val;
/* setup GP Timer 1 */
__raw_writel(GPTCR_SWR, &cur_gpt->control);
/* Freerun Mode, PERCLK1 input */
i = __raw_readl(&cur_gpt->control);
__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
- reset_timer_masked();
- return 0;
-}
-void reset_timer_masked(void)
-{
- ulong val = __raw_readl(&cur_gpt->counter);
+ val = __raw_readl(&cur_gpt->counter);
lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
timestamp = 0;
+
+ return 0;
}
ulong get_timer_masked(void)
writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
&timer_base->tclr);
- reset_timer_masked(); /* init the timestamp and lastinc value */
+ /* reset time, capture current incrementer value time */
+ gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
+ gd->tbl = 0; /* start "advancing" time stamp from 0 */
return 0;
}
}
}
-void reset_timer_masked(void)
-{
- /* reset time, capture current incrementer value time */
- gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
ulong get_timer_masked(void)
{
/* current tick value */
}
}
-void reset_timer_masked(void)
-{
- /* reset time, capture current incrementer value time */
- gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ);
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
ulong get_timer_masked(void)
{
ulong now;
int timer_init (void)
{
- reset_timer_masked();
+ writel(0, OSCR);
return 0;
}
udelay_masked (usec);
}
-
-void reset_timer_masked (void)
-{
- writel(0, OSCR);
-}
-
ulong get_timer_masked (void)
{
return tick_to_time(get_ticks());
/*NOP*/;
}
-void reset_timer_masked (void)
-{
- /* reset time */
- lastdec = READ_TIMER;
- timestamp = 0;
-}
-
ulong get_timer_masked (void)
{
ulong now = READ_TIMER;
udelay_masked (usec);
}
-
-void reset_timer_masked (void)
-{
- OSCR = 0;
-}
-
ulong get_timer_masked (void)
{
return OSCR;
/* init the timestamp */
total_count = 0ULL;
- reset_timer_masked();
+ /* capure current decrementer value */
+ lastdec = READ_TIMER;
+ /* start "advancing" time stamp from 0 */
+ timestamp = 0L;
div_timer = CONFIG_SYS_HZ_CLOCK;
do_div(div_timer, CONFIG_SYS_HZ);
}
}
-void reset_timer_masked (void)
-{
- /* capure current decrementer value */
- lastdec = READ_TIMER;
- /* start "advancing" time stamp from 0 */
- timestamp = 0L;
-}
-
/* converts the timer reading to U-Boot ticks */
/* the timestamp is the number of ticks since reset */
ulong get_timer_masked (void)