QIXIS_WRITE(brdcfg[5], brdcfg5);
}
#endif
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+ u8 brdcfg4, brdcfg5;
+
+ if (hwconfig("dspi-on-board")) {
+ brdcfg4 = QIXIS_READ(brdcfg[4]);
+ brdcfg4 &= ~BRDCFG4_USBOSC_MASK;
+ brdcfg4 |= BRDCFG4_SPI;
+ QIXIS_WRITE(brdcfg[4], brdcfg4);
+
+ brdcfg5 = QIXIS_READ(brdcfg[5]);
+ brdcfg5 &= ~BRDCFG5_SPR_MASK;
+ brdcfg5 |= BRDCFG5_SPI_ON_BOARD;
+ QIXIS_WRITE(brdcfg[5], brdcfg5);
+ } else if (hwconfig("dspi-off-board")) {
+ brdcfg4 = QIXIS_READ(brdcfg[4]);
+ brdcfg4 &= ~BRDCFG4_USBOSC_MASK;
+ brdcfg4 |= BRDCFG4_SPI;
+ QIXIS_WRITE(brdcfg[4], brdcfg4);
+
+ brdcfg5 = QIXIS_READ(brdcfg[5]);
+ brdcfg5 &= ~BRDCFG5_SPR_MASK;
+ brdcfg5 |= BRDCFG5_SPI_OFF_BOARD;
+ QIXIS_WRITE(brdcfg[5], brdcfg5);
+ }
+#endif
return 0;
}
#endif
#define BRDCFG5_SPISDHC_MASK 0x0C
#define BRDCFG5_FORCE_SD 0x08
+/* Definitions of QIXIS Registers for LS1088AQDS */
+
+/* BRDCFG4 */
+#define BRDCFG4_USBOSC_MASK 0x01
+#define BRDCFG4_SPI 0x01
+
+/* BRDCFG5 */
+#define BRDCFG5_SPR_MASK 0x0f
+#define BRDCFG5_SPI_ON_BOARD 0x0a
+#define BRDCFG5_SPI_OFF_BOARD 0x0f
+
#endif
#ifdef CONFIG_TFABOOT
#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_MISC_INIT_R
+
#define CONFIG_ENV_SIZE 0x20000
#define CONFIG_ENV_OFFSET 0x500000
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \