omap3: enable GP9 timer and UART2
authorAlbert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr>
Fri, 16 Jan 2015 08:09:47 +0000 (09:09 +0100)
committerTom Rini <trini@ti.com>
Thu, 29 Jan 2015 17:00:50 +0000 (12:00 -0500)
These are needed for the upcoming Cairo board support.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
arch/arm/cpu/armv7/omap3/clock.c

index 529ad9a942448fa66ba1d2c86c11a66f84572d88..006969e780b332ccab15c4da7d8826efb1ba84b9 100644 (file)
@@ -732,11 +732,20 @@ void per_clocks_enable(void)
        setbits_le32(&prcm_base->iclken_per, 0x08);     /* ICKen GPT2 */
        setbits_le32(&prcm_base->fclken_per, 0x08);     /* FCKen GPT2 */
 
+       /* Enable GP9 timer. */
+       setbits_le32(&prcm_base->clksel_per, 0x80);     /* GPT9 = 32kHz clk */
+       setbits_le32(&prcm_base->iclken_per, 0x400);    /* ICKen GPT9 */
+       setbits_le32(&prcm_base->fclken_per, 0x400);    /* FCKen GPT9 */
+
 #ifdef CONFIG_SYS_NS16550
        /* Enable UART1 clocks */
        setbits_le32(&prcm_base->fclken1_core, 0x00002000);
        setbits_le32(&prcm_base->iclken1_core, 0x00002000);
 
+       /* Enable UART2 clocks */
+       setbits_le32(&prcm_base->fclken1_core, 0x00004000);
+       setbits_le32(&prcm_base->iclken1_core, 0x00004000);
+
        /* UART 3 Clocks */
        setbits_le32(&prcm_base->fclken_per, 0x00000800);
        setbits_le32(&prcm_base->iclken_per, 0x00000800);