davinci: da850evm/omapl138-lcdk: Move BSS to SDRAM because SRAM is full
authorAdam Ford <aford173@gmail.com>
Tue, 26 Feb 2019 03:53:46 +0000 (21:53 -0600)
committerTom Rini <trini@konsulko.com>
Fri, 12 Apr 2019 12:05:49 +0000 (08:05 -0400)
In order to fully support SPL_OF_CONTROL, we need BSS to be a bit
larger. This patch relocates BSS to SDRAM instead of SRAM which
is similar to how ARMv7 boards (like OMAP2+) do it.

This means two new variables are required:
CONFIG_SPL_BSS_START_ADDR  set to DAVINCI_DDR_EMIF_DATA_BASE
CONFIG_SPL_BSS_MAX_SIZE is set to 0x1080000 which is 1 byte
before the location where U-Boot will load.

Signed-off-by: Adam Ford <aford173@gmail.com>
board/davinci/da8xxevm/u-boot-spl-da850evm.lds
include/configs/da850evm.h
include/configs/omapl138_lcdk.h

index 7b5fab7756cb524ee545a14555cd266d83a9b499..8f04911306bc4127cea744fefcf73f9056e0630e 100644 (file)
@@ -10,6 +10,9 @@
 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
                LENGTH = CONFIG_SPL_MAX_FOOTPRINT }
 
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+                LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
 ENTRY(_start)
@@ -42,6 +45,15 @@ SECTIONS
                __rel_dyn_end = .;
        } >.sram
 
+       __image_copy_end = .;
+
+       .end :
+       {
+               *(.__end)
+       }
+
+       _image_binary_end = .;
+
        .bss :
        {
                . = ALIGN(4);
@@ -49,12 +61,5 @@ SECTIONS
                *(.bss*)
                . = ALIGN(4);
                __bss_end = .;
-       } >.sram
-
-       __image_copy_end = .;
-
-       .end :
-       {
-               *(.__end)
-       }
+       } >.sdram
 }
index 583f9948072830b81e49d1ae6cb08362c4a8664e..94848f5128b05c6a58c48f45e4fef8ed564bc7e1 100644 (file)
@@ -48,7 +48,8 @@
 #define PHYS_SDRAM_1           DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
 #define PHYS_SDRAM_1_SIZE      (64 << 20) /* SDRAM size 64MB */
 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
-
+#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE
+#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000
 /* memtest start addr */
 #define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1 + 0x2000000)
 
index 1786e099ad4f7f7bff87b56ddd789f8ed85b3e5a..6680c3e5037507ace510cd9499a2762671d53987 100644 (file)
@@ -43,6 +43,9 @@
 #define PHYS_SDRAM_1_SIZE      (128 << 20) /* SDRAM size 128MB */
 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
 
+#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE
+#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000
+
 /* memtest start addr */
 #define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1 + 0x2000000)