static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
{
int ret;
+#ifndef CONFIG_DM_I2C
int old_bus;
i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);
ret = i2c_read(0x53, 0, 1, (unsigned char *)spd_params, 256);
i2c_set_bus_num(old_bus);
+#else
+ struct udevice *dev;
+ ret = i2c_get_chip_for_busnum(1, 0x53, 1, &dev);
+ if (!ret)
+ ret = dm_i2c_read(dev, 0, (unsigned char *)spd_params, 256);
+#endif
if (ret) {
printf("Cannot read DIMM params\n");
return 1;
/**
* clk_synthesizer_reg_read - Read register from synthesizer.
+ * dev: i2c bus device (not used if CONFIG_DM_I2C is not set)
* @addr: addr within the i2c device
* buf: Buffer to which value is to be read.
*
* be send along with enabling byte read more, and then read can happen.
* Returns 0 on success
*/
-static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
+static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf)
{
int rc;
/* Enable Bye read */
addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
+#ifndef CONFIG_DM_I2C
/* Send the command byte */
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
if (rc)
/* Read the Data */
return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
+#else
+ /* Send the command byte */
+ rc = dm_i2c_reg_write(dev, addr, *buf);
+ if (rc)
+ printf("Failed to send command to clock synthesizer\n");
+
+ /* Read the Data */
+ rc = dm_i2c_reg_read(dev, addr);
+ if (rc < 0)
+ return rc;
+
+ *buf = (u8)rc;
+ return 0;
+#endif
+
}
/**
* clk_synthesizer_reg_write - Write a value to register in synthesizer.
+ * dev: i2c bus device (not used if CONFIG_DM_I2C is not set)
* @addr: addr within the i2c device
* val: Value to be written in the addr.
*
* Enable the byte read mode in the address and start the i2c transfer.
* Returns 0 on success
*/
-static int clk_synthesizer_reg_write(int addr, uint8_t val)
+static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val)
{
- uint8_t cmd[2];
+ u8 cmd[2];
int rc = 0;
/* Enable byte write */
cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
cmd[1] = val;
+#ifndef CONFIG_DM_I2C
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
+#else
+ rc = dm_i2c_write(dev, addr, cmd, 2);
+#endif
if (rc)
printf("Clock synthesizer reg write failed at addr = 0x%x\n",
addr);
int setup_clock_synthesizer(struct clk_synth *data)
{
int rc;
- uint8_t val;
-
+ u8 val = 0;
+ struct udevice *dev = NULL;
+#ifndef CONFIG_DM_I2C
rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
if (rc) {
printf("i2c probe failed at address 0x%x\n",
CLK_SYNTHESIZER_I2C_ADDR);
return rc;
}
-
- rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
+#else
+ rc = i2c_get_chip_for_busnum(0, CLK_SYNTHESIZER_I2C_ADDR, 1, &dev);
+ if (rc) {
+ printf("failed to get device for synthesizer at address 0x%x\n",
+ CLK_SYNTHESIZER_I2C_ADDR);
+ return rc;
+ }
+#endif
+ rc = clk_synthesizer_reg_read(dev, CLK_SYNTHESIZER_ID_REG, &val);
if (val != data->id)
return rc;
/* Crystal Load capacitor selection */
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_XCSEL,
+ data->capacitor);
if (rc)
return rc;
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_MUX_REG,
+ data->mux);
if (rc)
return rc;
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV2_REG,
+ data->pdiv2);
if (rc)
return rc;
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV3_REG,
+ data->pdiv3);
if (rc)
return rc;
enable_basic_uboot_clocks();
}
+#if !defined(CONFIG_DM_I2C)
void gpi2c_init(void)
{
static int gpi2c = 1;
gpi2c = 0;
}
}
+#endif
void do_board_detect(void)
{
enable_i2c0_pin_mux();
+#ifndef CONFIG_DM_I2C
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
-
+#endif
if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
CONFIG_EEPROM_CHIP_ADDRESS))
printf("ti_i2c_eeprom_init failed\n");
if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4))
return;
+#ifndef CONFIG_DM_I2C
if (i2c_probe(TPS65217_CHIP_PM))
return;
+#else
+ if (power_tps65217_init(0))
+ return;
+#endif
+
/*
* On Beaglebone White we need to ensure we have AC power
* 1.10V. For MPU voltage we need to switch based on
* the frequency we are running at.
*/
+#ifndef CONFIG_DM_I2C
if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
return;
-
+#else
+ if (power_tps65910_init(0))
+ return;
+#endif
/*
* Depending on MPU clock and PG we will need a different
* VDD to drive at that speed.
if (first_time) {
enable_i2c0_pin_mux();
+#ifndef CONFIG_DM_I2C
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE);
+#endif
first_time = false;
}
}
{
unsigned short val;
+#ifndef CONFIG_DM_I2C
if (i2c_probe(I2C_CPLD_ADDR))
return PROFILE_NONE;
if (i2c_read(I2C_CPLD_ADDR, CFG_REG, 1, (unsigned char *)(&val), 2))
return PROFILE_NONE;
+#else
+ struct udevice *dev = NULL;
+ int rc;
+ rc = i2c_get_chip_for_busnum(0, I2C_CPLD_ADDR, 1, &dev);
+ if (rc)
+ return PROFILE_NONE;
+ rc = dm_i2c_read(dev, CFG_REG, (unsigned char *)(&val), 2);
+ if (rc)
+ return PROFILE_NONE;
+#endif
return (1 << (val & PROFILE_MASK));
}
#ifdef CONFIG_TI_I2C_BOARD_DETECT
void do_board_detect(void)
{
+ /* Ensure I2C is initialized for EEPROM access*/
+ gpi2c_init();
if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
CONFIG_EEPROM_CHIP_ADDRESS))
printf("ti_i2c_eeprom_init failed\n");
{
int mpu_vdd, ddr_volt;
+#ifndef CONFIG_DM_I2C
if (i2c_probe(TPS65218_CHIP_PM))
return;
+#else
+ if (power_tps65218_init(0))
+ return;
+#endif
switch (m) {
case 1000:
{
int mpu_vdd;
+#ifndef CONFIG_DM_I2C
if (i2c_probe(TPS62362_I2C_ADDR))
return;
+#else
+ if (power_tps62362_init(0))
+ return;
+#endif
switch (m) {
case 1000:
puts("Unknown MPU clock, not scaling\n");
return;
}
-
/* Set VDD_MPU voltage */
if (tps62362_voltage_update(TPS62362_SET3, mpu_vdd)) {
printf("%s failure\n", __func__);
return;
}
}
-
void gpi2c_init(void)
{
/* When needed to be invoked prior to BSS initialization */
if (first_time) {
enable_i2c0_pin_mux();
+#ifndef CONFIG_DM_I2C
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE);
+#endif
first_time = false;
}
}
/* setup board specific PMIC */
int power_init_board(void)
{
- struct pmic *p;
-
+ int rc;
+#ifndef CONFIG_DM_I2C
+ struct pmic *p = NULL;
+#endif
if (board_is_idk()) {
- power_tps62362_init(I2C_PMIC);
+ rc = power_tps62362_init(0);
+ if (rc)
+ goto done;
+#ifndef CONFIG_DM_I2C
p = pmic_get("TPS62362");
- if (p && !pmic_probe(p))
- puts("PMIC: TPS62362\n");
+ if (!p || pmic_probe(p))
+ goto done;
+#endif
+ puts("PMIC: TPS62362\n");
} else {
- power_tps65218_init(I2C_PMIC);
+ rc = power_tps65218_init(0);
+ if (rc)
+ goto done;
+#ifndef CONFIG_DM_I2C
p = pmic_get("TPS65218_PMIC");
- if (p && !pmic_probe(p))
- puts("PMIC: TPS65218\n");
+ if (!p || pmic_probe(p))
+ goto done;
+#endif
+ puts("PMIC: TPS65218\n");
}
-
+done:
return 0;
}
{
int r = -ENODEV;
char *idk_lcd = "no";
- uint8_t buf = 0;
+ u8 buf = 0;
/* Only valid for IDKs */
if (board_is_x15() || board_is_am572x_evm())
if (board_is_am571x_idk() && !am571x_idk_needs_lcd())
goto out;
+#ifndef CONFIG_DM_I2C
r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS);
if (r) {
printf("%s: Failed to set bus address to %d: %d\n",
OSD_TS_FT_REG_ID, r);
goto out;
}
+#else
+ struct udevice *dev;
+
+ r = i2c_get_chip_for_busnum(OSD_TS_FT_BUS_ADDRESS,
+ OSD_TS_FT_CHIP_ADDRESS, 1, &dev);
+ if (r) {
+ printf("%s: Failed to get I2C device %d/%d (ret %d)\n",
+ __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS,
+ r);
+ /* AM572x IDK has no explicit settings for optional LCD kit */
+ if (board_is_am571x_idk())
+ printf("%s: Touch screen detect failed: %d!\n",
+ __func__, r);
+ goto out;
+ }
+
+ /* Read FT ID */
+ r = dm_i2c_reg_read(dev, OSD_TS_FT_REG_ID);
+ if (r < 0) {
+ printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n",
+ __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS,
+ OSD_TS_FT_REG_ID, r);
+ goto out;
+ }
+ buf = (u8)r;
+#endif
switch (buf) {
case OSD_TS_FT_ID_5606:
#include "board_detect.h"
-#if defined(CONFIG_DM_I2C_COMPAT)
-/**
- * ti_i2c_set_alen - Set chip's i2c address length
- * @bus_addr - I2C bus number
- * @dev_addr - I2C eeprom id
- * @alen - I2C address length in bytes
- *
- * DM_I2C by default sets the address length to be used to 1. This
- * function allows this address length to be changed to match the
- * eeprom used for board detection.
- */
-int __maybe_unused ti_i2c_set_alen(int bus_addr, int dev_addr, int alen)
-{
- struct udevice *dev;
- struct udevice *bus;
- int rc;
-
- rc = uclass_get_device_by_seq(UCLASS_I2C, bus_addr, &bus);
- if (rc)
- return rc;
- rc = i2c_get_chip(bus, dev_addr, 1, &dev);
- if (rc)
- return rc;
- rc = i2c_set_chip_offset_len(dev, alen);
- if (rc)
- return rc;
-
- return 0;
-}
-#else
-int __maybe_unused ti_i2c_set_alen(int bus_addr, int dev_addr, int alen)
-{
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_DM_I2C) || defined(CONFIG_DM_I2C_COMPAT)
+#if !defined(CONFIG_DM_I2C)
/**
* ti_i2c_eeprom_init - Initialize an i2c bus and probe for a device
* @i2c_bus: i2c bus number to initialize
static int __maybe_unused ti_i2c_eeprom_read(int dev_addr, int offset,
uchar *ep, int epsize)
{
- int bus_num, rc, alen;
-
- bus_num = i2c_get_bus_num();
-
- alen = 2;
-
- rc = ti_i2c_set_alen(bus_num, dev_addr, alen);
- if (rc)
- return rc;
-
- return i2c_read(dev_addr, offset, alen, ep, epsize);
+ return i2c_read(dev_addr, offset, 2, ep, epsize);
}
#endif
u32 hdr_read;
int rc;
-#if defined(CONFIG_DM_I2C) && !defined(CONFIG_DM_I2C_COMPAT)
+#if defined(CONFIG_DM_I2C)
struct udevice *dev;
struct udevice *bus;
*/
byte = 2;
- rc = ti_i2c_set_alen(bus_addr, dev_addr, byte);
- if (rc)
- return rc;
-
rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4);
if (rc)
return rc;
*/
byte = 1;
if (rc) {
- rc = ti_i2c_set_alen(bus_addr, dev_addr, byte);
- if (rc)
- return rc;
-
rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read,
4);
}
#if defined(CONFIG_DTB_RESELECT)
static int k2g_alt_board_detect(void)
{
+#ifndef CONFIG_DM_I2C
int rc;
rc = i2c_set_bus_num(1);
rc = i2c_probe(K2G_GP_AUDIO_CODEC_ADDRESS);
if (rc)
return rc;
+#else
+ struct udevice *bus, *dev;
+ int rc;
+ rc = uclass_get_device_by_seq(UCLASS_I2C, 1, &bus);
+ if (rc)
+ return rc;
+ rc = dm_i2c_probe(bus, K2G_GP_AUDIO_CODEC_ADDRESS, 0, &dev);
+ if (rc)
+ return rc;
+#endif
ti_i2c_eeprom_am_set("66AK2GGP", "1.0X");
return 0;
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* Power */
+#ifndef CONFIG_DM_I2C
#define CONFIG_POWER
#define CONFIG_POWER_I2C
+#endif
#define CONFIG_POWER_TPS65218
#define CONFIG_POWER_TPS62362
/* Timer information. */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-/*
- * Disable DM_* for SPL build and can be re-enabled after adding
- * DM support in SPL
- */
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_DM_I2C
-#endif
-
-/* I2C IP block */
+/* If DM_I2C, enable non-DM I2C support */
+#if !defined(CONFIG_DM_I2C)
#define CONFIG_I2C
-#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
-#else
-/*
- * Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client
- * devices are adopted to DM
- */
-#define CONFIG_DM_I2C_COMPAT
#endif
/*