#define EMI1_SLOT4 4
#define EMI1_SLOT5 5
#define EMI2 7
-#elif defined(CONFIG_T2081QDS)
+#elif defined(CONFIG_TARGET_T2081QDS)
#define EMI1_SLOT2 3
#define EMI1_SLOT3 4
#define EMI1_SLOT5 5
"T2080QDS_MDIO_SLOT5",
"T2080QDS_MDIO_SLOT2",
"T2080QDS_MDIO_10GC",
-#elif defined(CONFIG_T2081QDS)
+#elif defined(CONFIG_TARGET_T2081QDS)
"T2081QDS_MDIO_RGMII1",
"T2081QDS_MDIO_RGMII2",
"T2081QDS_MDIO_SLOT1",
/* Map SerDes1 8 lanes to default slot, will be initialized dynamically */
#if defined(CONFIG_TARGET_T2080QDS)
static u8 lane_to_slot[] = {3, 3, 3, 3, 1, 1, 1, 1};
-#elif defined(CONFIG_T2081QDS)
+#elif defined(CONFIG_TARGET_T2081QDS)
static u8 lane_to_slot[] = {2, 2, 2, 2, 1, 1, 1, 1};
#endif
fdt_status_okay_by_alias(fdt, "emi1_slot2");
}
break;
-#elif defined(CONFIG_T2081QDS)
+#elif defined(CONFIG_TARGET_T2081QDS)
case FM1_DTSEC1:
case FM1_DTSEC2:
case FM1_DTSEC5:
lane_to_slot[6] = 3;
lane_to_slot[7] = 3;
break;
-#elif defined(CONFIG_T2081QDS)
+#elif defined(CONFIG_TARGET_T2081QDS)
case 0x6b:
lane_to_slot[4] = 1;
lane_to_slot[5] = 3;
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT4);
#endif
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT5);
-#if defined(CONFIG_T2081QDS)
+#if defined(CONFIG_TARGET_T2081QDS)
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT6);
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT7);
#endif
fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
break;
-#elif defined(CONFIG_T2081QDS)
+#elif defined(CONFIG_TARGET_T2081QDS)
case 0xca:
case 0xcb:
/* SGMII in Slot3 */
fm_info_set_mdio(i, mii_dev_for_muxval(
mdio_mux[i]));
break;
-#if defined(CONFIG_T2081QDS)
+#if defined(CONFIG_TARGET_T2081QDS)
case 5:
mdio_mux[i] = EMI1_SLOT5;
fm_info_set_mdio(i, mii_dev_for_muxval(