arm64: mvebu: Armada 7K/8K: Add Armada 7K/8K dts files
authorStefan Roese <sr@denx.de>
Wed, 25 May 2016 06:23:31 +0000 (08:23 +0200)
committerStefan Roese <sr@denx.de>
Tue, 27 Sep 2016 15:29:54 +0000 (17:29 +0200)
This patch integrates the Armada 7K/8K dts files from the latest
submission on the linux-arm-kernel mailing list.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
arch/arm/dts/Makefile
arch/arm/dts/armada-7040-db.dts [new file with mode: 0644]
arch/arm/dts/armada-7040.dtsi [new file with mode: 0644]
arch/arm/dts/armada-ap806-quad.dtsi [new file with mode: 0644]
arch/arm/dts/armada-ap806.dtsi [new file with mode: 0644]
arch/arm/dts/armada-cp110-master.dtsi [new file with mode: 0644]

index e2de5e4f17da0b99aa239dd86a410d7714596098..032c5aebc1c94b7e00d3aad30e30853e373b8895 100644 (file)
@@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_MVEBU) +=                   \
        armada-388-clearfog.dtb                 \
        armada-388-gp.dtb                       \
        armada-385-amc.dtb                      \
+       armada-7040-db.dtb                      \
        armada-xp-gp.dtb                        \
        armada-xp-maxbcm.dtb                    \
        armada-xp-synology-ds414.dtb            \
diff --git a/arch/arm/dts/armada-7040-db.dts b/arch/arm/dts/armada-7040-db.dts
new file mode 100644 (file)
index 0000000..070b589
--- /dev/null
@@ -0,0 +1,148 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada 7040 Development board platform
+ */
+
+#include "armada-7040.dtsi"
+
+/ {
+       model = "Marvell Armada 7040 DB board";
+       compatible = "marvell,armada7040-db", "marvell,armada7040",
+                    "marvell,armada-ap806-quad", "marvell,armada-ap806";
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x80000000>;
+       };
+};
+
+&i2c0 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
+&spi0 {
+       status = "okay";
+
+       spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <10000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "U-Boot";
+                               reg = <0 0x200000>;
+                       };
+                       partition@400000 {
+                               label = "Filesystem";
+                               reg = <0x200000 0xce0000>;
+                       };
+               };
+       };
+};
+
+&uart0 {
+       status = "okay";
+};
+
+
+&cpm_pcie2 {
+       status = "okay";
+};
+
+&cpm_i2c0 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
+&cpm_spi1 {
+       status = "okay";
+
+       spi-flash@0 {
+               #address-cells = <0x1>;
+               #size-cells = <0x1>;
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-max-frequency = <20000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "U-Boot";
+                               reg = <0x0 0x200000>;
+                       };
+
+                       partition@400000 {
+                               label = "Filesystem";
+                               reg = <0x200000 0xe00000>;
+                       };
+               };
+       };
+};
+
+&cpm_sata0 {
+       status = "okay";
+};
+
+&cpm_usb3_0 {
+       status = "okay";
+};
+
+&cpm_usb3_1 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/armada-7040.dtsi b/arch/arm/dts/armada-7040.dtsi
new file mode 100644 (file)
index 0000000..78d995d
--- /dev/null
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for the Armada 7040 SoC, made of an AP806 Quad and
+ * one CP110.
+ */
+
+#include "armada-ap806-quad.dtsi"
+#include "armada-cp110-master.dtsi"
+
+/ {
+       model = "Marvell Armada 7040";
+       compatible = "marvell,armada7040", "marvell,armada-ap806-quad",
+                    "marvell,armada-ap806";
+};
diff --git a/arch/arm/dts/armada-ap806-quad.dtsi b/arch/arm/dts/armada-ap806-quad.dtsi
new file mode 100644 (file)
index 0000000..ba43a43
--- /dev/null
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada AP806.
+ */
+
+#include "armada-ap806.dtsi"
+
+/ {
+       model = "Marvell Armada AP806 Quad";
+       compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@000 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x000>;
+                       enable-method = "psci";
+               };
+               cpu@001 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x001>;
+                       enable-method = "psci";
+               };
+               cpu@100 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x100>;
+                       enable-method = "psci";
+               };
+               cpu@101 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x101>;
+                       enable-method = "psci";
+               };
+       };
+};
diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi
new file mode 100644 (file)
index 0000000..20d256b
--- /dev/null
@@ -0,0 +1,229 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada AP806.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/dts-v1/;
+
+/ {
+       model = "Marvell Armada AP806";
+       compatible = "marvell,armada-ap806";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       aliases {
+               serial0 = &uart0;
+               serial1 = &uart1;
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       ap806 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               compatible = "simple-bus";
+               interrupt-parent = <&gic>;
+               ranges;
+
+               config-space {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       ranges = <0x0 0x0 0xf0000000 0x1000000>;
+
+                       gic: interrupt-controller@210000 {
+                               compatible = "arm,gic-400";
+                               #interrupt-cells = <3>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges;
+                               interrupt-controller;
+                               interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                               reg = <0x210000 0x10000>,
+                                     <0x220000 0x20000>,
+                                     <0x240000 0x20000>,
+                                     <0x260000 0x20000>;
+
+                               gic_v2m0: v2m@280000 {
+                                       compatible = "arm,gic-v2m-frame";
+                                       msi-controller;
+                                       reg = <0x280000 0x1000>;
+                                       arm,msi-base-spi = <160>;
+                                       arm,msi-num-spis = <32>;
+                               };
+                               gic_v2m1: v2m@290000 {
+                                       compatible = "arm,gic-v2m-frame";
+                                       msi-controller;
+                                       reg = <0x290000 0x1000>;
+                                       arm,msi-base-spi = <192>;
+                                       arm,msi-num-spis = <32>;
+                               };
+                               gic_v2m2: v2m@2a0000 {
+                                       compatible = "arm,gic-v2m-frame";
+                                       msi-controller;
+                                       reg = <0x2a0000 0x1000>;
+                                       arm,msi-base-spi = <224>;
+                                       arm,msi-num-spis = <32>;
+                               };
+                               gic_v2m3: v2m@2b0000 {
+                                       compatible = "arm,gic-v2m-frame";
+                                       msi-controller;
+                                       reg = <0x2b0000 0x1000>;
+                                       arm,msi-base-spi = <256>;
+                                       arm,msi-num-spis = <32>;
+                               };
+                       };
+
+                       timer {
+                               compatible = "arm,armv8-timer";
+                               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
+                                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
+                                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
+                                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+                       };
+
+                       odmi: odmi@300000 {
+                               compatible = "marvell,odmi-controller";
+                               interrupt-controller;
+                               msi-controller;
+                               marvell,odmi-frames = <4>;
+                               reg = <0x300000 0x4000>,
+                                     <0x304000 0x4000>,
+                                     <0x308000 0x4000>,
+                                     <0x30C000 0x4000>;
+                               marvell,spi-base = <128>, <136>, <144>, <152>;
+                       };
+
+                       xor@400000 {
+                               compatible = "marvell,mv-xor-v2";
+                               reg = <0x400000 0x1000>,
+                                     <0x410000 0x1000>;
+                               msi-parent = <&gic_v2m0>;
+                               dma-coherent;
+                       };
+
+                       xor@420000 {
+                               compatible = "marvell,mv-xor-v2";
+                               reg = <0x420000 0x1000>,
+                                     <0x430000 0x1000>;
+                               msi-parent = <&gic_v2m0>;
+                               dma-coherent;
+                       };
+
+                       xor@440000 {
+                               compatible = "marvell,mv-xor-v2";
+                               reg = <0x440000 0x1000>,
+                                     <0x450000 0x1000>;
+                               msi-parent = <&gic_v2m0>;
+                               dma-coherent;
+                       };
+
+                       xor@460000 {
+                               compatible = "marvell,mv-xor-v2";
+                               reg = <0x460000 0x1000>,
+                                     <0x470000 0x1000>;
+                               msi-parent = <&gic_v2m0>;
+                               dma-coherent;
+                       };
+
+                       spi0: spi@510600 {
+                               compatible = "marvell,armada-380-spi";
+                               reg = <0x510600 0x50>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&ap_syscon 3>;
+                               status = "disabled";
+                       };
+
+                       i2c0: i2c@511000 {
+                               compatible = "marvell,mv78230-i2c";
+                               reg = <0x511000 0x20>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                               timeout-ms = <1000>;
+                               clocks = <&ap_syscon 3>;
+                               status = "disabled";
+                       };
+
+                       uart0: serial@512000 {
+                               compatible = "snps,dw-apb-uart";
+                               reg = <0x512000 0x100>;
+                               reg-shift = <2>;
+                               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+                               reg-io-width = <1>;
+                               clocks = <&ap_syscon 3>;
+                               status = "disabled";
+                       };
+
+                       uart1: serial@512100 {
+                               compatible = "snps,dw-apb-uart";
+                               reg = <0x512100 0x100>;
+                               reg-shift = <2>;
+                               interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                               reg-io-width = <1>;
+                               clocks = <&ap_syscon 3>;
+                               status = "disabled";
+
+                       };
+
+                       ap_syscon: system-controller@6f4000 {
+                               compatible = "marvell,ap806-system-controller",
+                                            "syscon";
+                               #clock-cells = <1>;
+                               clock-output-names = "ap-cpu-cluster-0",
+                                                    "ap-cpu-cluster-1",
+                                                    "ap-fixed", "ap-mss";
+                               reg = <0x6f4000 0x1000>;
+                       };
+               };
+       };
+};
diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi
new file mode 100644 (file)
index 0000000..367138b
--- /dev/null
@@ -0,0 +1,228 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada CP110 Master.
+ */
+
+/ {
+       cp110-master {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               compatible = "simple-bus";
+               interrupt-parent = <&gic>;
+               ranges;
+
+               config-space {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       interrupt-parent = <&gic>;
+                       ranges = <0x0 0x0 0xf2000000 0x2000000>;
+
+                       cpm_syscon0: system-controller@440000 {
+                               compatible = "marvell,cp110-system-controller0",
+                                            "syscon";
+                               reg = <0x440000 0x1000>;
+                               #clock-cells = <2>;
+                               core-clock-output-names =
+                                       "cpm-apll", "cpm-ppv2-core", "cpm-eip",
+                                       "cpm-core", "cpm-nand-core";
+                               gate-clock-output-names =
+                                       "cpm-audio", "cpm-communit", "cpm-nand",
+                                       "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
+                                       "cpm-mg-core", "cpm-xor1", "cpm-xor0",
+                                       "cpm-gop-dp", "none", "cpm-pcie_x10",
+                                       "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
+                                       "cpm-sata", "cpm-sata-usb", "cpm-main",
+                                       "cpm-sd-mmc", "none", "none",
+                                       "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
+                                       "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
+                       };
+
+                       cpm_sata0: sata@540000 {
+                               compatible = "marvell,armada-8k-ahci";
+                               reg = <0x540000 0x30000>;
+                               interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cpm_syscon0 1 15>;
+                               status = "disabled";
+                       };
+
+                       cpm_usb3_0: usb3@500000 {
+                               compatible = "marvell,armada-8k-xhci",
+                                            "generic-xhci";
+                               reg = <0x500000 0x4000>;
+                               dma-coherent;
+                               interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cpm_syscon0 1 22>;
+                               status = "disabled";
+                       };
+
+                       cpm_usb3_1: usb3@510000 {
+                               compatible = "marvell,armada-8k-xhci",
+                                            "generic-xhci";
+                               reg = <0x510000 0x4000>;
+                               dma-coherent;
+                               interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cpm_syscon0 1 23>;
+                               status = "disabled";
+                       };
+
+                       cpm_spi0: spi@700600 {
+                               compatible = "marvell,armada-380-spi";
+                               reg = <0x700600 0x50>;
+                               #address-cells = <0x1>;
+                               #size-cells = <0x0>;
+                               cell-index = <1>;
+                               clocks = <&cpm_syscon0 0 3>;
+                               status = "disabled";
+                       };
+
+                       cpm_spi1: spi@700680 {
+                               compatible = "marvell,armada-380-spi";
+                               reg = <0x700680 0x50>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <2>;
+                               clocks = <&cpm_syscon0 1 21>;
+                               status = "disabled";
+                       };
+
+                       cpm_i2c0: i2c@701000 {
+                               compatible = "marvell,mv78230-i2c";
+                               reg = <0x701000 0x20>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cpm_syscon0 1 21>;
+                               status = "disabled";
+                       };
+
+                       cpm_i2c1: i2c@701100 {
+                               compatible = "marvell,mv78230-i2c";
+                               reg = <0x701100 0x20>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cpm_syscon0 1 21>;
+                               status = "disabled";
+                       };
+               };
+
+               cpm_pcie0: pcie@f2600000 {
+                       compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+                       reg = <0 0xf2600000 0 0x10000>,
+                             <0 0xf6f00000 0 0x80000>;
+                       reg-names = "ctrl", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       dma-coherent;
+
+                       bus-range = <0 0xff>;
+                       ranges =
+                               /* downstream I/O */
+                               <0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000
+                               /* non-prefetchable memory */
+                               0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       num-lanes = <1>;
+                       clocks = <&cpm_syscon0 1 13>;
+                       status = "disabled";
+               };
+
+               cpm_pcie1: pcie@f2620000 {
+                       compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+                       reg = <0 0xf2620000 0 0x10000>,
+                             <0 0xf7f00000 0 0x80000>;
+                       reg-names = "ctrl", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       dma-coherent;
+
+                       bus-range = <0 0xff>;
+                       ranges =
+                               /* downstream I/O */
+                               <0x81000000 0 0xf9010000 0  0xf9010000 0 0x10000
+                               /* non-prefetchable memory */
+                               0x82000000 0 0xf7000000 0  0xf7000000 0 0xf00000>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+
+                       num-lanes = <1>;
+                       clocks = <&cpm_syscon0 1 11>;
+                       status = "disabled";
+               };
+
+               cpm_pcie2: pcie@f2640000 {
+                       compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+                       reg = <0 0xf2640000 0 0x10000>,
+                             <0 0xf8f00000 0 0x80000>;
+                       reg-names = "ctrl", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       dma-coherent;
+
+                       bus-range = <0 0xff>;
+                       ranges =
+                               /* downstream I/O */
+                               <0x81000000 0 0xf9020000 0  0xf9020000 0 0x10000
+                               /* non-prefetchable memory */
+                               0x82000000 0 0xf8000000 0  0xf8000000 0 0xf00000>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+
+                       num-lanes = <1>;
+                       clocks = <&cpm_syscon0 1 12>;
+                       status = "disabled";
+               };
+       };
+};